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PDM41024SA15TATY

Description
Standard SRAM, 128KX8, 15ns, CMOS, PDSO32, TSOP1-32
Categorystorage    storage   
File Size231KB,8 Pages
ManufacturerIXYS
Download Datasheet Parametric View All

PDM41024SA15TATY Overview

Standard SRAM, 128KX8, 15ns, CMOS, PDSO32, TSOP1-32

PDM41024SA15TATY Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIXYS
package instructionTSOP1-32
Reach Compliance Codeunknown
Maximum access time15 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-G32
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width8
Humidity sensitivity level1
Number of functions1
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
organize128KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Encapsulate equivalent codeTSSOP32,.8,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)225
power supply5 V
Certification statusNot Qualified
Minimum standby current4.5 V
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
PDM41024
1 Megabit Static RAM
128K x 8-Bit
Features
n
1
2
3
4
5
6
7
Description
The PDM41024 is a high-performance CMOS static
RAM organized as 131,072 x 8 bits. Writing is
accomplished when the write enable (WE) and the
chip enable (CE1) inputs are both LOW and CE2 is
HIGH. Reading is accomplished when WE and CE2
remain HIGH and CE1 and OE are both LOW.
The PDM41024 operates from a single +5V power
supply and all the inputs and outputs are fully TTL-
compatible. The PDM41024 comes in two versions:
the standard power version (SA) and the low power
version (LA). The two versions are functionally the
same and differ only in their power consumption.
The PDM41024 is available in a 32-pin plastic TSOP
(I), and a 300-mil and 400-mil plastic SOJ.
High-speed access times
Com’l: 10, 12 and 15 ns
Ind’l: 12 and 15 ns
Low power operation (typical)
- PDM41024SA
Active: 450 mW
Standby: 50 mW
- PDM41024LA
Active: 400 mW
Standby: 25mW
Single +5V (±10%) power supply
TTL-compatible inputs and outputs
Packages
Plastic SOJ (300 mil) - TSO
Plastic SOJ (400 mil) - SO
Plastic TSOP (I)- T
n
n
n
n
Functional Block Diagram
A
0
A
16
Decoder
Addresses
Memory
Matrix
8
9
10
I/O
0
I/O
7
• • • • •
Input
Data
Control
Column I/O
11
12
1
CE1
CE2
WE
OE
Control
Rev. 3.3 - 4/09/98
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