IDT71682LA55DB datasheet, PDF - EEWORLD Datasheet

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IDT71682LA55DB: DescriptionStandard SRAM, 4KX4, 55ns, CMOS, CDIP24, 0.300 INCH, CERDIP-24; Categorystorage storage; File Size84KB，8 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT71682LA55DB Overview

Standard SRAM, 4KX4, 55ns, CMOS, CDIP24, 0.300 INCH, CERDIP-24

IDT71682LA55DB Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	DIP
package instruction	0.300 INCH, CERDIP-24
Contacts	24
Reach Compliance Code	not_compliant
ECCN code	3A001.A.2.C
Maximum access time	55 ns
I/O type	SEPARATE
JESD-30 code	R-GDIP-T24
JESD-609 code	e0
length	32.004 mm
memory density	16384 bit
Memory IC Type	STANDARD SRAM
memory width	4
Number of functions	1
Number of ports	1
Number of terminals	24
word count	4096 words
character code	4000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	4KX4
Output characteristics	3-STATE
Exportable	NO
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum seat height	5.08 mm
Maximum standby current	0.0001 A
Minimum standby current	2 V
Maximum slew rate	0.08 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm

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CMOS STATIC RAMS

16K (4K x 4-BIT)

Separate Data Inputs and Outputs

Integrated Device Technology, Inc.

IDT71681SA/LA

IDT71682SA/LA

FEATURES:

• Separate data inputs and outputs

• IDT71681SA/LA: outputs track inputs during write mode

• IDT71682SA/LA: high-impedance outputs during write

mode

• High speed (equal access and cycle time)

— Military: 15/20/25/35/45/55/70/85/100ns (max.)

— Commercial: 15/20/25/35/45ns (max.)

• Low power consumption

• Battery backup operation—2V data retention (LA version

only)

• High-density 24-pin 300-mil Ceramic or Plastic DIP, 24-

pin CERPACK, and 28-pin leadless chip carrier

• Produced with advanced CMOS high-performance

technology

• CMOS process virtually eliminates alpha particle soft-

error rates

• Military product compliant to MIL-STD-883, Class B

DESCRIPTION:

The IDT71681/IDT71682 are 16,384-bit high-speed static

RAMs organized as 4K x 4. They are fabricated using IDT’s

high-performance, high-reliability technology—CMOS. This

state-of-the-art technology, combined with innovative circuit

design techniques, provides a cost-effective approach for

high-speed memory applications.

Access times as fast as 15ns are available. These circuits

also offer a reduced power standby mode. When

goes

HIGH, the circuit will automatically go to, and remain in, this

standby mode as long as

remains HIGH. In the standby

mode, the devices consume less than 10µW, typically. This

capability provides significant system-level power and cooling

savings. The low-power (LA) versions also offer a battery

backup data retention capability where the circuit typically

consumes only 1µW operating off a 2V battery.

All inputs and outputs of the IDT71681/IDT71682 are TTL-

compatible and operate from a single 5V supply.

FUNCTIONAL BLOCK DIAGRAM

ADDRESS

DECODER

16,384-BIT

MEMORY ARRAY

GND

I/O CONTROL

INPUT

DATA

CONTROL

IDT71682 ONLY

IDT71681 ONLY

2984 drw 01

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGES

Integrated Device Technology, Inc.

MAY 1994

DSC-1018/3

5.3

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