P
RELIMINARY
P
RODUCT
S
PECIFICATION
1
Z86C61/62/96
CMOS Z8 M
ICROCONTROLLER
FEATURES
Device
Z86C61
Z86C62
Z86C96
ROM
(KB)
16
16
16
RAM*
(Bytes)
236
236
236
I/O
Lines
32
52
52
s
s
s
s
s
s
s
s
s
s
1
All Digital Inputs are TTL Levels
Auto Latches
RAM and ROM Protect
Two Programmable 8-Bit Counter/Timers,
Each with 6-Bit Programmable Prescaler
Six Vectored, Priority Interrupts from Eight Different
Sources
Clock Speeds: 16 and 20 MHz
On-Chip Oscillator that Accepts a Crystal, Ceramic
Resonator, LC, or External Clock Drive
Note:
*General-Purpose
3.0V to 5.5V Operating Range
Low Power Consumption: 200 mW (max)
Fast Instruction Pointer: 0.75 µs @ 16 MHz
Two Standby Modes: STOP and HALT
Full-Duplex UART
s
s
s
GENERAL DESCRIPTION
The Z86C61/62/96 microcontroller is a member of the Z8
single-chip microcontroller family with 16 KB of ROM and
236 bytes of RAM. The Z86C96 is ROMless.
The Z86C61 is offered in 40-pin DIP and 44-pin PLCC style
packages, however, the ROMless pin option is available
on the 44-pin version only. The Z86C62/96 is offered in 64-
pin DIP and 68-pin PLCC style packages. A ROMless pin
option enables these MCUs to address both external mem-
ory and preprogrammed ROM, making them well-suited for
high-volume applications or where code flexibility is re-
quired.
With 16 KB of ROM and 236 bytes of general-purpose
RAM, these low-cost, low power consumption CMOS
Z86C61/62/96 MCUs offer fast execution, efficient use of
memory, sophisticated interrupts, input/output bit manipu-
lation capabilities, and easy hardware/software system ex-
pansion.
The Z86C61/62/96 architecture is characterized by Zilog’s
8-bit microcontroller core. The device offers a flexible I/O
scheme, an efficient register and address space structure,
multiplexed capabilities between address/data, I/O, and a
number of ancillary features that are useful in many indus-
trial and advanced scientific applications.
For applications which demand powerful I/O capabilities,
the Z86C61 fulfills this with 32 pins dedicated to input and
output. These lines are grouped into four ports with eight
lines each. The Z86C62/96 has 52 pins for input and out-
put, and these lines are grouped into six, 8-bit ports and
one 4-bit port. Each port is configurable under software
control to provide timing, status signals, serial or parallel
I/O with or without handshake, and an address/data bus for
interfacing external memory.
There are three basic address spaces available to support
this configuration: Program Memory, Data Memory, and
236 General-Purpose Registers.
DS97Z8X1600
PRELIMINARY
1
Z86C61/62/96
CMOS Z8 Microcontroller
Zilog
GENERAL DESCRIPTION
(Continued)
To unburden the program from coping with the real-time
tasks, such as counting/timing and serial data communica-
tion, the Z86C61/62/96 offers two on-chip counter/timers
with a large number of user selectable modes, and an on-
board UART (Figures 1, 2, and 3).
Notes:
All Signals with a preceding front slash, "/", are ac-
tive Low. For example B//W (WORD is active Low); /B/W
(BYTE is active Low, only).
Power connections follow conventional descriptions be-
low:
Connection
Power
Ground
Circuit
V
CC
GND
Device
V
DD
V
SS
Output Input
Vcc
GND
XTAL /AS /DS R//W /RESET
Port 3
Machine Timing and
Instruction Control
UART
ALU
Counter/
Timers
(2)
FLAGS
Prg. Memory
16,384
x 8-Bit
Interrupt
Control
Register
Pointer
Register File
256 x 8-Bit
Program
Counter
Port 2
Port 0
Port 1
4
I/O
(Bit Programmable)
4
8
Address/Data or I/O
(Byte Programmable)
Address or I/O
(Nibble Programmable)
Figure 1. Z86C61 Functional Block Diagram
2
PRELIMINARY
DS97Z8X1600
RF/Wirelessly
京公网安备 11010802033920号
EEWORLD
