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Datasheet> All Categories > Analog mixed-signal IC> The signal circuit> NLAST4052DTR2
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NLAST4052DTR2

Description
4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, TSSOP-16
CategoryAnalog mixed-signal IC    The signal circuit   
File Size810KB，17 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Environmental Compliance  
Download Datasheet Parametric Compare View All

NLAST4052DTR2 Overview

4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, TSSOP-16

NLAST4052DTR2 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerRochester Electronics
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts16
Reach Compliance Codeunknown
Analog Integrated Circuits - Other TypesDIFFERENTIAL MULTIPLEXER
JESD-30 codeR-PDSO-G16
JESD-609 codee4
length5 mm
Humidity sensitivity levelNOT SPECIFIED
Maximum negative supply voltage (Vsup)-5.5 V
Negative supply voltage minimum (Vsup)
Nominal Negative Supply Voltage (Vsup)-3 V
Number of channels4
Number of functions1
Number of terminals16
Nominal off-state isolation93 dB
On-state resistance matching specifications15 Ω
Maximum on-state resistance (Ron)37 Ω
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusCOMMERCIAL
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.5 V
Nominal supply voltage (Vsup)3 V
surface mountYES
Maximum disconnect time28 ns
Maximum connection time28 ns
technologyCMOS
Temperature levelMILITARY
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm

NLAST4052DTR2 Preview

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NLAST4052
Analog Multiplexer/
Demultiplexer
TTL Compatible, Double–Pole, 4–Position
Plus Common Off
The NLAST4052 is an improved version of the MC14052 and
MC74HC4052 fabricated in sub–micron Silicon Gate CMOS
technology for lower R
DS(on)
resistance and improved linearity with
low current. This device may be operated either with a single supply or
dual supply up to
±3
V to pass a 6 V
PP
signal without coupling
capacitors.
When operating in single supply mode, it is only necessary to tie
V
EE
, pin 7 to ground. For dual supply operation, V
EE
is tied to a
negative voltage, not to exceed maximum ratings. Translation is
provided in the device, the Address and Inhibit pins are standard TTL
level compatible. For CMOS compatibility see NLAS4052. Pin for
pin compatible with all industry standard versions of ‘4052.’
http://onsemi.com
MARKING DIAGRAMS
16
9
SO–16
D SUFFIX
CASE 751B
NLAST4052
AWLYWW
1
8
16
9
•
Improved R
DS(on)
Specifications
•
Pin for Pin Replacement for MAX4052 and MAX4052A
– One Half the Resistance Operating at 5.0 Volts
•
Single or Dual Supply Operation
– Single 3–5 Volt Operation, or Dual
±3
Volt Operation
– With V
CC
of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,
–
No Translators Needed
– Address and Inhibit pins are Logic is Over–Voltage Tolerant and
–
–
May Be Driven Up +6 V Regardless of V
CC
•
Address and Inhibit pins are Standard TTL Compatible
– Greatly Improved Noise Margin Over MAX4052 and MAX4052A
– True TTL Compatibility V
IL
= 0.8 V, V
IH
= 2.0 V
•
Improved Linearity Over Standard HC4052 Devices
NLAST
ALYW
TSSOP–16
DT SUFFIX
CASE 948F
1
8
16
9
QSOP–16
QS SUFFIX
CASE 492
A
L, WL
Y
W
NLAST
4052
ALYW
1
8
•
Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin
Packages
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
NLAST4052D
NLAST4052DR2
NLAST4052DT
NLAST4052DTR2
NLAST4052QS
NLAST4052QSR
Package
SO–16
SO–16
TSSOP–16
TSSOP–16
QSOP–16
QSOP–16
Shipping
48 Units/Rail
2500 Units/Reel
96 Units/Rail
2500 Units/Reel
98 Units/Rail
2500 Units/Reel
©
Semiconductor Components Industries, LLC, 2002
1
June, 2002 – Rev. 2
Publication Order Number:
NLAST4052/D
NLAST4052
V
CC
16
NO
1A
NO
2A
COM
A
NO
0A
NO
3A
ADD
B
ADD
A
15
14
13
12
11
10
9
NO
0B
NO
1B
COM
B
NO
3B
NO
2B
ADD
B
LOGIC
ADD
A
NO
1A
NO
2A
COM
A
NO
0A
NO
3A
Inhibit
1
2
3
4
5
6
7
8
GND
NO
0B
NO
1B
COM
B
NO
3B
NO
2B
Inhibit V
EE
Figure 1. Pin Connection
(Top View)
Figure 2. Logic Diagram
TRUTH TABLE
Address
Inhibit
1
0
0
0
0
0
0
0
0
B
X
don’t care
0
0
1
1
0
0
1
1
A
X
don’t care
0
1
0
1
0
1
0
1
ON SWITCHES*
All switches open
COM
A
–NO
0A
,
COM
B
–NO
0B
COM
A
–NO
1A
,
COM
B
–NO
1B
COM
A
–NO
2A
,
COM
B
–NO
2B
COM
A
–NO
3A
,
COM
B
–NO
3B
COM
A
–NO
0A
,
COM
B
–NO
0B
COM
A
–NO
1A
,
COM
B
–NO
1B
COM
A
–NO
2A
,
COM
B
–NO
2B
COM
A
–NO
3A
,
COM
B
–NO
3B
*N/C, NO, and COM pins are identical and interchangeable. Either may be
considered an input or output; signals pass equally well in either direction.
http://onsemi.com
2
NLAST4052
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MAXIMUM RATINGS
(Note 1)
Symbol
Parameter
Value
Unit
V
V
V
V
V
EE
Negative DC Supply Voltage
(Referenced to GND)
–7.0 to
)0.5
–0.5 to
)7.0
–0.5 to
)7.0
V
CC
V
IS
Positive DC Supply Voltage (Note 2)
Analog Input Voltage
Digital Input Voltage
(Referenced to GND)
(Referenced to V
EE
)
V
EE
–0.5 to V
CC
)0.5
–0.5 to 7.0
$50
V
IN
I
(Referenced to GND)
DC Current, Into or Out of Any Pin
Storage Temperature Range
mA
°C
°C
°C
T
STG
T
L
T
J
–65 to
)150
260
)150
143
164
164
500
450
450
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature under Bias
Thermal Resistance
q
JA
SOIC
TSSOP
QSOP
SOIC
TSSOP
QSOP
°C/W
P
D
Power Dissipation in Still Air,
mW
MSL
F
R
Moisture Sensitivity
Level 1
Flammability Rating
Oxygen Index: 30% – 35%
UL 94 V–0 @ 0.125 in
u2000
u200
u1000
$300
V
ESD
ESD Withstand Voltage
Human Body Model (Note 3)
Machine Model (Note 4)
Charged Device Model (Note 5)
V
I
LATCH–UP
Latch–Up Performance
Above V
CC
and Below GND at 125°C (Note 6)
mA
1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Extended exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum–rated
conditions is not implied.
2. The absolute value of V
CC
$|V
EE
|
≤
7.0.
3. Tested to EIA/JESD22–A114–A.
4. Tested to EIA/JESD22–A115–A.
5. Tested to JESD22–C101–A.
6. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
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V
EE
Negative DC Supply Voltage
Positive DC Supply Voltage
Analog Input Voltage
Digital Input Voltage
(Referenced to GND)
–5.5
2.5
2.5
GND
5.5
6.6
V
V
V
V
V
CC
V
IS
T
A
(Referenced to GND)
(Referenced to V
EE
)
V
EE
0
–55
0
0
V
CC
5.5
125
100
20
V
IN
(Note 7) (Referenced to GND)
V
CC
= 3.0 V
$
0.3 V
V
CC
= 5.0 V
$
0.5 V
Operating Temperature Range, All Package Types
°C
t
r
, t
f
Input Rise/Fall Time
(Channel Select or Enable Inputs)
ns/V
7. Unused digital inputs may not be left open. All digital inputs must be tied to a high–logic voltage level or a low–logic input voltage level.
Symbol
Parameter
Min
Max
Unit
http://onsemi.com
3
NLAST4052
DC CHARACTERISTICS – Digital Section
(Voltages Referenced to GND)
V
CC
V
3.0
4.5
5.5
3.0
4.5
5.5
V
IN
= 6.0 or GND
Address, Inhibit, and
V
IS
= V
CC
or GND
0 V to 6.0 V
6.0
Guaranteed Limit
–55
to 25°C
1.6
2.0
2.0
0.5
0.8
0.8
$0.1
4.0
v85°C
1.6
2.0
2.0
0.5
0.8
0.8
$1.0
40
v125°C
1.6
2.0
2.0
0.5
0.8
0.8
$1.0
80
Unit
V
Symbol
V
IH
Parameter
Minimum High–Level Input Voltage,
Address or Inhibit Inputs
Maximum Low–Level Input Voltage,
Address or Inhibit Inputs
Maximum Input Leakage Current,
Address or Inhibit Inputs
Maximum Quiescent Supply
Current (per Package)
Condition
V
IL
V
I
IN
I
CC
mA
mA
DC ELECTRICAL CHARACTERISTICS – Analog Section
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Symbol
Parameter
Test Conditions
V
CC
V
3.0
4.5
3.0
3.0
4.5
3.0
V
EE
V
Guaranteed Limit
v85°C
108
46
33
20
18
15
4
2
–55 to 25°C
86
37
26
15
13
10
4
2
v125°C
120
55
37
20
18
15
5
3
Unit
W
R
ON
Maximum “ON” Resistance
V
IN
= V
IL
or V
IH
V
IS
= V
EE
to V
CC
|I
S
| = 10 mA
(Figures 4 thru 9)
V
IN
= V
IL
or V
IH,
0
0
–3.0
0
0
–3.0
DR
ON
Maximum Difference in “ON”
Resistance Between Any
Two Channels in the Same
Package
|I
S
| = 10 mA,
V
IS
= 2.0 V
V
IS
= 3.5 V
V
IS
= 2.0 V
W
R
flat(ON)
ON Resistance Flatness
Maximum Off–Channel
Leakage Current
V
com
1, 2, 3.5 V
V
com
–2, 0, 2 V
4.5
3.0
W
–3.0
0
–3.0
I
NC(OFF)
I
NO(OFF)
Switch Off
V
IN
= V
IL
or V
IH
V
IO
= V
CC
–1.0 V or V
EE
+1.0 V
(Figure 17)
6.0
3.0
0.1
0.1
5.0
5.0
100
100
nA
I
COM(ON)
Maximum On–Channel
Leakage Current, Channel–
to–Channel
Switch On
V
IO
= V
CC
–1.0 V or V
EE
+1.0 V
(Figure 17)
6.0
3.0
0
–3.0
0.1
0.1
5.0
5.0
100
100
nA
http://onsemi.com
4
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NLAST4052DTR2 Related Products

NLAST4052DTR2 NLAST4052QSR NLAST4052DT NLAST4052DR2
Description 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, TSSOP-16 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, QSOP-16 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, TSSOP-16 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO16, SOIC-16
Maker Rochester Electronics Rochester Electronics Rochester Electronics Rochester Electronics
Parts packaging code TSSOP SOIC TSSOP SOIC
package instruction TSSOP, QSOP-16 TSSOP, SOIC-16
Contacts 16 16 16 16
Reach Compliance Code unknown unknown unknown unknown
Analog Integrated Circuits - Other Types DIFFERENTIAL MULTIPLEXER DIFFERENTIAL MULTIPLEXER DIFFERENTIAL MULTIPLEXER DIFFERENTIAL MULTIPLEXER
JESD-30 code R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16
length 5 mm 4.9 mm 5 mm 9.9 mm
Maximum negative supply voltage (Vsup) -5.5 V -5.5 V -5.5 V -5.5 V
Nominal Negative Supply Voltage (Vsup) -3 V -3 V -3 V -3 V
Number of channels 4 4 4 4
Number of functions 1 1 1 1
Number of terminals 16 16 16 16
Nominal off-state isolation 93 dB 93 dB 93 dB 93 dB
On-state resistance matching specifications 15 Ω 15 Ω 15 Ω 15 Ω
Maximum on-state resistance (Ron) 37 Ω 37 Ω 37 Ω 37 Ω
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SSOP TSSOP SOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE
Certification status COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Maximum seat height 1.2 mm 1.75 mm 1.2 mm 1.75 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V
Nominal supply voltage (Vsup) 3 V 3 V 3 V 3 V
surface mount YES YES YES YES
Maximum disconnect time 28 ns 28 ns 28 ns 28 ns
Maximum connection time 28 ns 28 ns 28 ns 28 ns
technology CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY MILITARY
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.635 mm 0.65 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL
width 4.4 mm 3.9116 mm 4.4 mm 3.9 mm
Is it lead-free? Lead free Contains lead - Contains lead
JESD-609 code e4 e0 - e0
Humidity sensitivity level NOT SPECIFIED 1 - 1
Peak Reflow Temperature (Celsius) NOT SPECIFIED 235 - 235
Terminal surface NICKEL PALLADIUM GOLD TIN LEAD - TIN LEAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED

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Shortcut:   S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

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