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AMPALC29M16-45DC

Description
EE PLD, 55ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SLIM, CERAMIC, DIP-24
CategoryProgrammable logic devices    Programmable logic   
File Size527KB,18 Pages
ManufacturerAMD
Websitehttp://www.amd.com
Download Datasheet Parametric View All

AMPALC29M16-45DC Overview

EE PLD, 55ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SLIM, CERAMIC, DIP-24

AMPALC29M16-45DC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerAMD
Parts packaging codeDIP
package instructionDIP, DIP24,.3
Contacts24
Reach Compliance Codeunknown
ArchitecturePAL-TYPE
maximum clock frequency15 MHz
JESD-30 codeR-CDIP-T24
JESD-609 codee0
length31.9405 mm
Dedicated input times3
Number of I/O lines16
Number of entries29
Output times16
Number of product terms188
Number of terminals24
Maximum operating temperature70 °C
Minimum operating temperature
organize3 DEDICATED INPUTS, 16 I/O
Output functionMACROCELL
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programmable logic typeEE PLD
propagation delay55 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
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