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PRELIMINARY
2.4 VOLT ADVANCED+ BOOT BLOCK
FLASH MEMORY
28F800C2, 28F160C2 (x16)
Flexible SmartVoltage Technology
2.4 V–3.0 V Read/Program/Erase
12 V for Fast Production
Programming
High Performance
2.4 V–3.0 V: 100 ns Max Access
Time
2.7 V–3.0 V: 90 ns Max Access Time
Optimized Architecture for Code Plus
Data Storage
Eight 4- Kword Blocks,
Top or Bottom Locations
Up to Sixty-Three 32-Kword Blocks
Fast Program Suspend Capability
Fast Erase Suspend Capability
Flexible Block Locking
Lock/Unlock Any Block
Full Protection on Power-Up
WP# Pin for Hardware Block
Protection
V
PP
=
GND Option
V
CC
Lockout Voltage
Low Power Consumption
8 mA Typical Read Power
10 µA Typical Standby Power with
Automatic Power Savings Feature
Extended Temperature Operation
–40 °C to +85 °C
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Improved 12 V Production
Programming
Faster Production Programming
No Additional System Logic
128-bit Protection Register
64-bit Unique Device Identifier
64-bit User Programmable OTP
Cells
Extended Cycling Capability
Minimum 100,000 Block Erase
Cycles
Supports Flash Data Integrator
Software
Flash Memory Manager
System Interrupt Manager
Supports Parameter Storage,
Streaming Data (e.g., voice)
Automated Word/Byte Program and
Block Erase
Command User Interface
Status Registers
Cross-Compatible Command Support
Intel Basic Command Set
Common Flash Interface
x16 I/O for Various Applications
48-Ball
µBGA*
Package
48-Lead TSOP Package
0.25
µ
ETOX™ VI Flash Technology
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The 0.25 µm 2.4 Volt Advanced+ Boot Block flash memory, manufactured on Intel’s latest 0.25 µ technology,
represents a feature-rich solution for low power applications. These flash memory devices incorporate low
voltage capability (2.4 V read, program and erase) with high-speed, low-power operation. Flexible block
locking allows any block to be independently locked or unlocked. A 128-bit protection register enhances
customers’ ability to develop secure systems. Add to this the Intel-developed Flash Data Integrator (FDI)
software and you have a cost-effective, flexible, monolithic code plus data storage solution. 2.4 Volt
Advanced+ Boot Block products will be available in 48-lead TSOP and 48-ball µBGA* packages. All devices
have a 16-bit data bus. Additional information on this product family can be obtained by accessing Intel’s
Flash website: http://www.intel.com/design/flash.
June 1999
Order Number: 290647-002
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of
Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to
sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or
infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life
saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
The 28F800C2 and 28F160C2 may contain design defects or errors known as errata which may cause the product to deviate
from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call 1-800-548-4725
or visit Intel’s website at http:\\www.intel.com
COPYRIGHT © INTEL CORPORATION 1998, 1999
*
Other brands and names are the property of their respective owners.
CG-041493
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CONTENTS
PAGE
1.0 INTRODUCTION..............................................5
1.1 2.4 Volt Advanced+ Boot Block Flash
Memory Enhancements...............................5
1.2 Product Overview .........................................6
2.0 PRODUCT DESCRIPTION ..............................6
2.1 Package Pinouts ..........................................6
2.2 Block Organization .......................................9
2.2.1 Parameter Blocks ..................................9
2.2.2 Main Blocks ...........................................9
3.0 PRINCIPLES OF OPERATION .....................10
3.1 Bus Operation ............................................10
3.1.1 Read....................................................10
3.1.2 Output Disable.....................................10
3.1.3 Standby ...............................................10
3.1.4 Reset...................................................11
3.1.5 Write....................................................11
3.2 Modes of Operation....................................11
3.2.1 Read Array ..........................................11
3.2.2 Read Configuration..............................12
3.2.3 Read Status Register...........................12
3.2.3.1 Clearing the Status Register .........12
3.2.4 Read Query .........................................12
3.2.5 Program Mode.....................................13
3.2.5.1 Suspending and Resuming
Program .......................................13
3.2.6 Erase Mode .........................................13
3.2.6.1 Suspending and Resuming Erase.14
3.3 Flexible Block Locking................................18
3.3.1 Locking Operation ...............................18
3.3.2 Locked State .......................................18
3.3.3 Unlocked State ....................................18
3.3.4 Lock-Down State .................................18
3.3.5 Reading a Block’s Lock Status ............19
3.3.6 Locking Operations during Erase
Suspend .............................................19
3.3.7 Status Register Error Checking ...........19
28F800C2, 28F160C2
PAGE
3.4 128-Bit Protection Register........................ 20
3.4.1 Reading the Protection Register ......... 20
3.4.2 Programming the Protection Register . 20
3.4.3 Locking the Protection Register .......... 21
3.5 V
PP
Program and Erase Voltages.............. 21
3.5.1 Improved 12 V Operation for Production
Programming ..................................... 21
3.5.2 V
PP
≤
V
PPLK
for Complete Protection .. 21
3.6 Power Consumption .................................. 22
3.6.1 Active Power (Program/Erase/Read) .. 22
3.6.2 Automatic Power Savings (APS)......... 22
3.6.3 Standby Power ................................... 22
3.6.4 Deep Power-Down Mode .................... 23
3.7 Power-Up/Down Operation........................ 23
3.7.1 RP# Connected to System Reset ....... 23
3.7.2 V
CC
, V
PP
and RP# Transitions ............ 23
3.8 Power Supply Decoupling.......................... 23
4.0 ELECTRICAL SPECIFICATIONS................. 24
4.1 Absolute Maximum Ratings ....................... 24
4.2 Operating Conditions................................. 24
4.3 Capacitance .............................................. 25
4.4 DC Characteristics..................................... 25
4.5 AC Characteristics—Read Operations—
Extended Temperature ............................. 29
4.6 AC Characteristics—Write Operations—
Extended Temperature ............................. 31
4.7 Erase and Program Timings ...................... 32
4.8 Reset Operations....................................... 34
5.0 ORDERING INFORMATION......................... 35
6.0 ADDITIONAL INFORMATION ...................... 36
APPENDIX A: WSM Current/Next States ......... 37
APPENDIX B: Program/Erase Flowcharts ....... 39
APPENDIX C: Common Flash Interface Query
Structure ..................................................... 45
3
PRELIMINARY
28F800C2, 28F160C2
APPENDIX D: Architecture Block Diagram ......52
APPENDIX E: Word-Wide Memory Map
Diagrams .....................................................53
APPENDIX F: Device ID Table .......................... 55
APPENDIX G: Protection Register
Addressing ................................................. 56
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REVISION HISTORY
Date of
Revision
11/17/98
06/11/99
Version
-001
-002
Original version
Removed all references to x8 configurations
Removed 32-Mbit offering
Appendix C,
CFI Query Structure,
tables updated
Description
4
PRELIMINARY
E
1.0
28F800C2, 28F160C2
INTRODUCTION
1.1
2.4 Volt Advanced+ Boot Block
Flash Memory Enhancements
This document contains the specifications for the
2.4 Volt Advanced+ Boot Block flash memory
family. These flash memories add features which
can be used to enhance the security of systems:
instant block locking and a protection register.
Throughout this document, the term “2.4 V” refers
to the full voltage range 2.4 V–3.0 V (except where
noted otherwise) and “V
PP
= 12 V” refers to 12 V
±5%. Sections 1 and 2 provide an overview of the
flash memory family including applications, pinouts,
pin descriptions and memory organization. Section
3 describes the operation of these products. Finally,
Section 4 contains the operating specifications.
The 2.4 Volt Advanced+ Boot Block flash memory
features:
•
•
•
Zero-latency, flexible block locking
128-bit Protection Register
Simple system implementation for 12 V
production programming with 2.4 V in-field
programming
Ultra-low power operation at 2.4 V
Minimum 100,000 block erase cycles
Common Flash Interface for software query of
device specs and features
•
•
•
Table 1. 2.4 Volt Advanced+ Boot Block Feature Summary
Feature
V
CC
Operating Voltage
V
PP
Voltage
V
CCQ
I/O Voltage
Bus Width
Speed (ns)
Blocking (top or bottom)
8 Mbit
(1)
, 16 Mbit
2.4 V – 3.0 V
Provides complete write protection with
optional 12 V Fast Programming
2.4 V– 3.0 V
16-bit
8/16 Mbit: 100, 120 @ 2.4 V and 90, 110 @ 2.7 V
8 x 4-Kword parameter
8-Mb: 15 x 32-Kword main
16-Mb: 31 x 32-Kword main
Operating Temperature
Program/Erase Cycling
Packages
Block Locking
Protection Register
Extended: –40 °C to +85 °C
100,000 cycles
48-Lead TSOP
48-Ball
µBGA*
CSP
(1)
Flexible locking of any block with zero latency
64-bit unique device number, 64-bit user programmable
Table 2
Section 4.4
Section 2.2
Appendix E
Reference
Table 8
Table 8
Table 8
Table 8
Figures 1 and 2
Section 3.3
Section 3.4
NOTE:
1. 8-Mbit density not available in µBGA* CSP.
PRELIMINARY
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