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TC74HC4060AF(EL,F)

Description
TC74HC4060AF(EL,F)
Categorylogic    logic   
File Size264KB,10 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Environmental Compliance
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TC74HC4060AF(EL,F) Overview

TC74HC4060AF(EL,F)

TC74HC4060AF(EL,F) Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerToshiba Semiconductor
package instructionSOP, SOP16,.3
Reach Compliance Codeunknown
Counting directionUP
seriesHC
JESD-30 codeR-PDSO-G16
length10.3 mm
Load capacitance (CL)50 pF
Load/preset inputNO
Logic integrated circuit typeBINARY COUNTER
Maximum Frequency@Nom-Sup24000000 Hz
MaximumI(ol)0.004 A
Operating modeASYNCHRONOUS
Number of digits14
Number of functions1
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.3
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Prop。Delay @ Nom-Sup75 ns
propagation delay (tpd)375 ns
Maximum seat height1.9 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Trigger typeNEGATIVE EDGE
width5.3 mm
minfmax28 MHz

TC74HC4060AF(EL,F) Preview

TC74HC4060AP/AF
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74HC4060AP,TC74HC4060AF
14-Stage Binary Counter/Oscillator
The TC74HC4060A is a high speed CMOS 14-STAGE BINARY
COUNTER fabricated with silicon gate C
2
MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
The oscillator configuration allows designs using either RC or
crystal oscillator circuits, or an external clock may be used.
The clear input resets the counter to a low level on all outputs
and disables the oscillator.
A high CLR accomplishes this reset function.
A negative transition on the clock input (
ϕ
I) increments the
counter Ten levels of divided output are provided; 4 stage thru 10
stage and 12 stage thru 14 stage. At the last stage (Q14), a
1/16384 divided frequency is obtained.
The
ϕ
I input and CLR input are equipped with protection
circuits against static discharge or transient excess voltage.
TC74HC4060AP
TC74HC4060AF
Features
High speed: f
max
=
58 MHz (typ.) at V
CC
=
5 V
Low power dissipation: I
CC
=
4
μA
(max) at Ta
=
25°C
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(min)
Output drive capability: 10 LSTTL loads
Symmetrical output impedance: |I
OH
|
=
I
OL
=
4 mA (min)
Balanced propagation delays: t
pLH
t
pHL
Wide operating voltage range: V
CC
(opr)
=
2 to 6 V
Oscillator configuration: RC or crystal oscillator
Pin and function compatible with 4060B
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
: 1.00 g (typ.)
: 0.18 g (typ.)
Pin Assignment
1
2007-10-01
TC74HC4060AP/AF
IEC Logic Symbol
Truth Table
Inputs
φ
I
CLR
Function
Counter is reset to zero state.
X
H
φ
O output goes to high level.
φ
O
output goes to low level.
L
L
Count up one step.
No Change
System Diagram
2
2007-10-01
TC74HC4060AP/AF
Absolute Maximum Ratings (Note 1)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Rating
0.5 to 7
0.5 to V
CC
+
0.5
0.5 to V
CC
+
0.5
±
20
±
20
±
25
±
50
Unit
V
V
V
mA
mA
mA
mA
mW
°C
500 (DIP) (Note 2)/180 (SOP)
65 to 150
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta
= −40
to 65°C. From Ta
=
65 to 85°C a derating factor of
−10
mW/°C shall be
applied until 300 mW.
Operating Range (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Symbol
V
CC
V
IN
V
OUT
T
opr
Rating
2 to 6
0 to V
CC
0 to V
CC
40 to 85
Unit
V
V
V
°C
0 to 1000 (V
CC
=
2.0 V)
Input rise and fall time
t
r
, t
f
0 to 500 (V
CC
=
4.5 V)
0 to 400 (V
CC
=
6.0 V)
ns
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
3
2007-10-01
TC74HC4060AP/AF
Electrical Characteristics
DC Characteristics
Test Condition
Characteristics
Symbol
V
CC
(V)
2.0
High-level input
voltage
V
IH
Ta
=
25°C
Min
1.50
3.15
4.20
Ta
= −
40 to
85°C
Max
Unit
Typ.
Min
1.50
3.15
4.20
Max
4.5
6.0
2.0
V
0.50
1.35
1.80
0.50
1.35
1.80
Low-level input
voltage
V
IL
4.5
6.0
2.0
V
1.9
4.4
5.9
4.18
5.68
1.8
4.0
5.5
2.0
4.5
6.0
4.31
5.80
2.0
4.5
5.9
0.0
0.0
0.0
0.17
0.18
0.0
0.0
0.1
1.9
4.4
5.9
4.13
5.63
1.8
4.0
5.5
High-level output
voltage
(Qn)
V
OH
V
IN
=
V
IH
or
V
IL
I
OH
= −
20
μ
A
I
OH
= −
4 mA
I
OH
= −
5.2 mA
4.5
6.0
4.5
6.0
2.0
4.5
6.0
2.0
V
High-level output
voltage
(
φ
O,
φ
O
)
V
OH
V
IN
=
V
IH
or I
OH
= −
20
μ
A
V
IL
V
0.1
0.1
0.1
0.26
0.26
0.2
0.5
0.5
±
0.1
0.1
0.1
0.1
0.33
0.33
0.2
0.5
0.5
±
1.0
μ
A
μ
A
Low-level output
voltage
(Qn)
V
OL
V
IN
=
V
IH
or
V
IL
I
OL
=
20
μ
A
I
OL
=
4 mA
I
OL
=
5.2 mA
4.5
6.0
4.5
6.0
2.0
4.5
6.0
6.0
6.0
V
Low-level output
voltage
(
φ
O,
φ
O )
Input leakage
current
Quiescent supply
current
V
OL
V
IN
=
V
IH
or I
OL
=
20
μ
A
V
IL
V
IN
=
V
CC
or GND
V
IN
=
V
CC
or GND
V
I
IN
I
CC
4.0
40.0
4
2007-10-01
TC74HC4060AP/AF
Timing Requirements
(input: t
r
=
t
f
=
6 ns)
Characteristics
Symbol
Test Condition
V
CC
(V)
Minimum pulse width
(
φ
I )
t
W (L)
t
W (H)
2.0
Ta
=
25°C
Typ.
Ta
=
40 to
85°C
Limit
95
19
16
95
19
16
125
25
21
5
24
28
Unit
Limit
75
15
13
75
15
13
100
20
17
6
30
35
4.5
6.0
2.0
ns
Minimum pulse time
(CLR)
t
W (H)
4.5
6.0
2.0
ns
Minimum removal time
t
rem
4.5
6.0
2.0
ns
Clock frequency
f
4.5
6.0
MHz
AC Characteristics
(C
L
=
15 pF, V
CC
=
5 V, Ta
=
25°C, input: t
r
=
t
f
=
6 ns)
Characteristics
Output transition time
Propagation delay time
(
φ
I -Q
4
)
Propagation delay time difference
(Qn-Qn
+
1)
Propagation delay time
(CLR)
Maximum clock frequency
Symbol
t
TLH
t
THL
t
pLH
t
pHL
Δ
t
pd
Test Condition
Min
Typ.
4
Max
8
Unit
ns
36
53
ns
C
L
=
15 pF (Qn, Qn
+
1)
6
14
ns
t
pHL
f
max
19
58
34
ns
MHz
33
5
2007-10-01

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