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DS1000S-30

Description
Silicon Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDSO8, 0.150 INCH, SOIC-8
Categorylogic    logic   
File Size66KB,5 Pages
ManufacturerDALLAS
Websitehttp://www.dalsemi.com
Download Datasheet Parametric View All

DS1000S-30 Overview

Silicon Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDSO8, 0.150 INCH, SOIC-8

DS1000S-30 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerDALLAS
package instruction0.150 INCH, SOIC-8
Reach Compliance Codeunknown
Other featuresBOTH LEADING & TRAILING EDGE ACCURACY; MAX FAN OUT OF 10 74LS LOAD PER OUTPUT
seriesCMOS/TTL
Input frequency maximum value (fmax)20.8333 MHz
JESD-30 codeR-PDSO-G8
JESD-609 codee0
Logic integrated circuit typeSILICON DELAY LINE
Number of functions1
Number of taps/steps5
Number of terminals8
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Maximum supply current (ICC)75 mA
programmable delay lineNO
Prop。Delay @ Nom-Sup30 ns
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Total delay nominal (td)30 ns
DS1000
5-Tap Silicon Delay Line
www.dalsemi.com
FEATURES
All-silicon time delay
5 taps equally spaced
Delays are stable and precise
Both leading and trailing edge accuracy
Delay tolerance
±5%
or
±2
ns, whichever is
greater
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
Custom delays available
Fast turn prototypes
Extended temperature range available
(DS1000-IND)
IN
NC
NC
TAP 2
NC
TAP 4
GND
PIN ASSIGNMENT
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
NC
TAP 1
TAP 4
NC
GND
TAP 3
NC
TAP 5
1
2
3
4
8
7
6
5
V
CC
TAP 1
TAP 3
TAP 5
4
5
TAP 5
3
6
TAP 3
IN
TAP 2
1
2
8
7
V
CC
TAP 1
DS1000M 8-Pin DIP (300-mil)
See Mech. Drawings Section
IN
DS1000 14-Pin DIP (300-mil)
See Mech. Drawings Section
TAP 2
TAP 4
GND
DS1000Z 8-Pin SOIC (150-mil)
See Mech. Drawings Section
PIN DESCRIPTION
TAP 1-TAP 5
V
CC
GND
NC
IN
- TAP Output Number
- +5 Volts
- Ground
- No Connection
- Input
DESCRIPTION
The DS1000 series delay lines have five equally spaced taps providing delays from 4 ns to 500 ns. These
devices are offered in a standard 14-pin DIP that is pin-compatible with hybrid delay lines. Alternatively,
8-pin DIPs and surface mount packages are available to save PC board area. Low cost and superior
reliability over hybrid technology is achieved by the combination of a 100% silicon delay line and
industry standard DIP and SOIC packaging. In order to maintain complete pin compatibility, DIP
packages are available with hybrid lead configurations. The DS1000 series delay lines provide a nominal
accuracy of
±5%
or
±2
ns, whichever is greater. The DS1000 5-Tap Silicon Delay Line reproduces the
input logic state at the output after a fixed delay as specified by the extension of the part number after the
dash. The DS1000 is designed to reproduce both leading and trailing edges with equal precision. Each
tap is capable of driving up to ten 74LS loads. Dallas Semiconductor can customize standard products to
meet special needs. For special requests and rapid delivery, call 972-371-4348.
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