74HCT14D,652 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > logic> logic> 74HCT14D,652

74HCT14D,652: Description74HC14; 74HCT14 - Hex inverting Schmitt trigger SOIC 14-Pin; Categorylogic logic; File Size274KB，18 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com; Environmental Compliance

Download Datasheet Parametric Compare View All

74HCT14D,652 Overview

74HC14; 74HCT14 - Hex inverting Schmitt trigger SOIC 14-Pin

74HCT14D,652 Parametric

Parameter Name	Attribute value
Brand Name	Nexperia
Is it Rohs certified?	conform to
Maker	Nexperia
Parts packaging code	SOIC
package instruction	SOP-14
Contacts	14
Manufacturer packaging code	SOT108-1
Reach Compliance Code	compliant
Factory Lead Time	4 weeks
Samacsys Description	NXP 74HCT14D,652, Hex Schmitt Trigger Inverter, 4.5 → 5.5 V, 14-Pin SOIC
series	HCT
JESD-30 code	R-PDSO-G14
JESD-609 code	e4
length	8.65 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	INVERTER
Humidity sensitivity level	1
Number of functions	6
Number of entries	1
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	51 ns
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm

Preview

Download Datasheet

View All

74HC14; 74HCT14

Hex inverting Schmitt trigger

Rev. 8 — 22 May 2020

Product data sheet

1. General description

The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced

input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this

enables the use of current limiting resistors to interface inputs to voltages in excess of V

. Schmitt

trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals.

2. Features and benefits

•

Complies with JEDEC standard no. 7A

Low-power dissipation

ESD protection:

•

HBM JESD22-A114F exceeds 2000 V

•

MM JESD22-A115-A exceeds 200 V

Multiple package options

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

3. Applications

•

Wave and pulse shapers

Astable multivibrators

Monostable multivibrators

4. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range

74HC14D

74HCT14D

74HC14DB

74HCT14DB

74HC14PW

74HCT14PW

74HC14BQ

74HCT14BQ

-40 °C to +125 °C

TSSOP14

-40 °C to +125 °C

SSOP14

-40 °C to +125 °C

Name

SO14

Description

plastic small outline package; 14 leads;

body width 3.9 mm

plastic shrink small outline package; 14 leads; body

width 5.3 mm

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

Version

SOT108-1

SOT337-1

SOT402-1

SOT762-1

DHVQFN14 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

74HCT14D,652 Related Products

	74HCT14D,652	74HCT14PW,112	74HC14D/S15,118	74HC14D/S430,118	74HC14DJ	74HCT14D/G,118	74HCT14D/N,118	74HCT14D/S71,118	74HC14D/G,118	74HC14D/N,118
Description	74HC14; 74HCT14 - Hex inverting Schmitt trigger SOIC 14-Pin	74HC14; 74HCT14 - Hex inverting Schmitt trigger TSSOP 14-Pin	74HC14; 74HCT14 - Hex inverting Schmitt trigger SOIC 14-Pin	74HC14; 74HCT14 - Hex inverting Schmitt trigger SOIC 14-Pin	74HC14; 74HCT14 - Hex inverting Schmitt trigger SOIC 14-Pin	74HC(T)14 - Hex inverting Schmitt trigger SOIC 14-Pin	74HC(T)14 - Hex inverting Schmitt trigger SOIC 14-Pin	74HC14; 74HCT14 - Hex inverting Schmitt trigger SOIC 14-Pin	74HC(T)14 - Hex inverting Schmitt trigger SOIC 14-Pin	74HC(T)14 - Hex inverting Schmitt trigger SOIC 14-Pin
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperi	Nexperi
Parts packaging code	SOIC	TSSOP	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC
package instruction	SOP-14	TSSOP-14	SOP, SOP14,.25	SOP, SOP14,.25	3.90 MM WIDTH, PLASTIC, MS-012, SOT-108-1, SO-14	3.90 MM, PLASTIC, MS-012, SOT108-1, SOP-14	3.90 MM, PLASTIC, MS-012, SOT108-1, SOP-14	3.90 MM, PLASTIC, MS-012, SOT108-1, SOP-14	3.90 MM WIDTH, PLASTIC, MS-012, SOT-108-1, SO-14	SOP, SOP14,.25
Contacts	14	14	14	14	14	14	14	14	14	14
Manufacturer packaging code	SOT108-1	SOT402-1	SOT108-1	SOT108-1	SOT108-1	SOT108-1	SOT108-1	SOT108-1	SOT108-1	SOT108-1

Recommended Resources

Generator longitudinal differential protection circuit a

High current three-phase asynchronous motor Y conversion energy-saving control circuit_3

Simulated natural wind controller circuit

555 small livestock and poultry house constant temperature control circuit

Photosensitive element test circuit

Computer motherboard circuit diagram 830_05

Here is a collector's edition of op amp books: mos运算放大器原理设计应用(李联著)...; lixiaohai8211 Analog electronics

TI Live: The latest reference solutions for video doorbells, network cameras, etc., and the core components for their implementation: Want to find the latest video doorbell and network camera solutions for reference? Or the prototype of the relevant solution has been finalized, what devices are suitable, cheap, easy to use, and what...; nmg TI Technology Forum

Implementation of the standard output function Printf on the MSP430G2553 hardware platform: [p=null, 2, left]Serial port debugging provides great convenience for us to debug the microcontroller program. Through it, we can monitor the running status of the program at any time. When learning C...; qinkaiabc Microcontroller MCU

How to write a testbench for a subroutine in vivado: There are too many programs in a project, but I don't need so many of them. I just want to see the timing diagram of one of the subroutines, but I don't know how to write a testbench. Do I need to wri...; 刘123 FPGA/CPLD

Continuing Openmv4, filling the pits and digging the road one: starting from the source process: [font=宋体][size=4] Well, I finally squeezed out some time. I still owe the goddess and the captain a few posts. I thought, let's make this a serial post to talk about it. [/size][/font][font=宋体][size=4...; RCSN stm32/stm8

A novice asks a question: How to use an oscilloscope to check whether the 485 communication is normal: Dear seniors, I would like to ask how to use an oscilloscope to check whether the 485 communication is normal. Thank you....; navigat Test/Measurement

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components