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SMA6F15A

Description
Surface Mount TRANSZORB® Transient Voltage Suppressors
File Size99KB,5 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
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SMA6F15A Overview

Surface Mount TRANSZORB® Transient Voltage Suppressors

New Product
SMA6F5.0A thru SMA6F20A
www.vishay.com
Vishay General Semiconductor
Surface Mount T
RANS
Z
ORB®
Transient Voltage Suppressors
FEATURES
SlimSMA
TM
• Very low profile - typical height of 0.95 mm
• Ideal for automated placement
• Uni-directional only
• Excellent clamping capability
• Peak pulse power:
- 600 W (10/1000 μs)
- 4 kW (8/20 μs)
• ESD capability: IEC 61000-4-2 level 4
- 15 kV (air)
- 8 kV (contact)
• Meets MSL level 1, per J-STD-020, LF maximum peak of
260 °C
Top View
Bottom View
DO-221AC
PRIMARY CHARACTERISTICS
V
WM
P
PPM
(10 x 1000 μs)
P
PPM
(8 x 20 μs)
P
D
at T
M
= 55 °C
T
J
max.
5.0 V to 20 V
600 W
4000 W
6W
175 °C
• Compliant to RoHS Directive 2002/95/EC and in
accordance to WEEE 2002/96/EC
Halogen-free according to IEC 61249-2-21 definition
MECHANICAL DATA
Case:
DO-221AC (SlimSMA)
Molding compound meets UL 94 V-0 flammability rating
Base P/N-M3 - halogen-free, RoHS compliant, and
commercial grade
Terminals:
Matte tin plated leads, solderable
J-STD-002 and JESD22-B102
M3 suffix meets JESD 201 class 1A whisker test
Polarity:
Color band denotes cathode end
per
TYPICAL APPLICATIONS
Use in sensitive electronics protection against voltage
transients induced by inductive load switching and lighting
on ICs, MOSFET, signal lines of sensor units for consumer,
computer, industrial, and telecommunication.
MAXIMUM RATINGS
(T
A
= 25 °C, unless otherwise noted)
PARAMETER
Peak pulse power dissipation
with a 10/1000 μs waveform
with a 8/20 μs waveform
with a 10/1000 μs waveform
with a 8/20 μs waveform
T
M
= 55 °C
T
A
= 25 °C
SYMBOL
P
PPM (1)
I
PPM (1)
P
D (2)
P
D (3)
T
STG
T
J
VALUE
600
4000
See next table
6
1.0
- 65 to + 175
°C
- 55 to + 175
UNIT
W
Peak pulse current
A
Power dissipation
Storage temperature range
Operating junction temperature range
W
Notes
(1)
Non-repetitive current pulse, per fig. 3 and derated above T = 25 °C per fig. 2.
A
(2)
Power dissipation mounted on infinite heatsink
(3)
Power dissipation mounted on minimum recommended pad layout
Revision: 23-Nov-11
Document Number: 89458
1
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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