WJCE6210882214 datasheet, PDF - EEWORLD Datasheet

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WJCE6210882214: DescriptionAudio/Video Demodulator, AM, CMOS, 7 X 7 MM, LEAD FREE, LQFP-64; CategoryAnalog mixed-signal IC Consumption circuit; File Size462KB，19 Pages; ManufacturerIntel; Websitehttp://www.intel.com/; Environmental Compliance

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WJCE6210882214 Overview

Audio/Video Demodulator, AM, CMOS, 7 X 7 MM, LEAD FREE, LQFP-64

WJCE6210882214 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Intel
Parts packaging code	QFP
package instruction	QCCN, QFP64,.47SQ,20
Contacts	64
Reach Compliance Code	compliant
Commercial integrated circuit types	AUDIO/VIDEO DEMODULATOR
Demodulation type	AM
JESD-30 code	S-XQCC-N64
JESD-609 code	e3
Number of functions	1
Number of terminals	64
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	UNSPECIFIED
encapsulated code	QCCN
Encapsulate equivalent code	QFP64,.47SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.8,3.3 V
Certification status	Not Qualified
Maximum supply voltage (Vsup)	1.89 V
Minimum supply voltage (Vsup)	1.71 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED

WJCE6210882214 Preview

CE6210

DVB-C Cable Demodulator

Data Sheet

Features

•

DVB-C EN300429 and ITU-T J.83 annex A/C

compliant QAM demodulator

Conventional IF and low IF input supported

QAM constellations 16, 32, 64, 128 and 256

Symbol rates up to 9 MBaud

Blind acquisition of all symbol rates

Blind acquisition of QAM constellations

Single IF filter bandwidth for all symbol rates

Signal level, BER and SNR indicators

Programmable IF/RF AGC take-over point

Power down mode under software control

Parallel and serial MPEG outputs

External 4 or 27 MHz clock or single low-cost

10 MHz crystal

Small package size LQFP64 7x7 mm

Power consumption <300 mW at 6.9 MBaud

5 V tolerant 2-wire bus control interface

5 V tolerant GPIO port and AGC outputs

•

Ordering Information

DJCE6210 882133 64-pin LQFP Trays

WJCE6210 882214 64-pin LQFP* Trays

*Pb free

-40

C to +85

RF level detect facility via a separate ADC

Very low driver software overhead due to on-chip

state-machine control.

General purpose programmable timer

June 2006

Applications

•

Set-top boxes

Digital cable ready TV applications

Cable modems

SMATV/MATV receivers

Figure 1 - System Diagram

Intel Corporation

D55750-001

Intel and the Intel logo are registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.

*Other names and brands may be claimed as the property of others.

CE6210

Description

Data Sheet

The CE6210 is a DVB-C and ITU-T annex A/C QAM demodulator. This low power cable demodulator includes

standard Intel features of auto signal acquisition, fast blind-scan capability, software/ hardware power down, RF

level, BER and SNR detection. The CE6210 represents the latest in QAM demodulation for DVB cable. Together

with a cable tuner, a full digital cable receiver front-end can be realized. Either conventional intermediate

frequencies such as 36 or 44 MHz or low intermediate frequencies can be used - see application below. The

CE6210 requires only a single channel filter bandwidth of 8 MHz nominal for full DVB and ITU-T annex A/C

performance. The low power consumption, small package form factor and integrated software/hardware power-

down modes help reduce the system BoM (bill of materials) in cost sensitive applications. The device is packaged

in a 7 x 7 mm 64-pin LQFP.

Functional Description

The CE6210 accepts an analog signal from the tuner, either at low Intermediate Frequency (IF) or conventional IF

up to 50 MHz, and delivers an MPEG2 compliant transport stream. It contains a single 10-bit analog-to-Digital

Converter (ADC), a digital QAM demodulator and Forward Error Correcting (FEC) decoder. The QAM demodulator

supports QAM constellations 16 to 256. Both the QAM demodulator and the FEC are DVB and ITU-T J.83

annex A/C compliant.

Figure 2 - CE6210 Functional Diagram

The ADC uses a fixed sample rate greater than four times the maximum symbol rate. Hence for 1 to 9 MBaud

applications, the signal has to be sampled at a frequency around 36 MHz. The spectrum of the analog signal being

sampled may be located at near-zero IF (e.g. centered at 9 MHz) or it may be located at a conventional IF such as

36.2 MHz or 43.5 MHz.

First consider the case of IF sampling a 1 to 7 MBaud QAM signal centered at 36.2 MHz intermediate frequency.

The sampling frequency chosen for this application is 28.9 MHz. This sampling process will fold the 36.2 MHz IF

spectrum to one centered at 7.3 MHz.

Second consider the case of IF sampling a 1 to 6 MBaud QAM signal centered at 43.5 MHz IF. The sampling

frequency chosen for this application is 25 MHz. This sampling process will result in a QAM spectrum centered at

6.5 MHz.

In the second case the sampling process results in spectral inversion. Even in first case the IF spectrum may be

spectrally inverted. However, spectral inversion is not an issue with CE6210 since it automatically detects and

corrects for this in the digital domain.

Intel Corporation

CE6210

Data Sheet

The digital signal is first mixed down to baseband. However, as a result of tuning errors this signal will not be

centered at zero frequency. CE6210 has an automatic frequency control (AFC) loop that can track out tuning errors

and hence in the tracking phase this signal will be centered at zero frequency. The AFC loop can typically

compensate for +/-350 kHz frequency offsets. Larger offsets can be corrected by programming on-chip registers.

The baseband signal is filtered to reduce the effect of adjacent channels. Additional on-chip digital filtering is

provided for low symbol rate applications. For example, it is possible to demodulate and decode a 1 MBaud QAM

signal using only one external 8 MHz SAW filter.

CE6210 has complete blind acquisition capability. It can automatically search and lock on to any QAM constellation

in the set 16, 32, 64, 128 and 256. It can compensate for spectral inversion. It can also automatically acquire a

symbol rate in the range 1 to 7 MBaud correcting for any tuning errors and adapting the filter bandwidths to signal

bandwidth. All these functions are implemented using a sophisticated built-in control state machine with no software

intervention.

The symbol-spaced equalizer in the CE6210 is designed to acquire the QAM signal in blind mode, i.e., with no

training sequence, and then to track the signal in the decision feedback mode. The equalizer has a feed-forward

segment and a feedback segments. The tap partitioning between feed-forward and feedback is fully programmable.

The symbol timing and phase recovery functions with the CE6210 are fully digital. The timing recovery phase

locked loop has a built in timing sweep to enable the CE6210 to lock on to unknown symbol rates. The phase

recovery loop has been optimised to overcome phase noise degradation caused by typical tuners.

The CE6210 QAM demodulator has built in control mechanisms to overcome signal degradation due to impulse

noise in cable systems. The most significant bits of the demodulated I/Q symbols are differentially decoded to

remove multiples of 90 degree phase ambiguity in demodulation. The QAM symbols are then demapped into a bit

stream, using the constellation definitions provided by DVB and ITU-T. The number of bits per symbol is eight for

QAM-256, seven for QAM-128, six for QAM-64, five for QAM-32 and four for QAM-16.

The bitstream is aligned into bytes and then into 204-byte frames by the Frame Alignment Unit. These frames are

deinterleaved as defined by DVB to improve the resilience of the system to error bursts. The (204,188) Reed-

Solomon decoder, which follows the deinterleaver, can correct up to eight byte-errors per frame. This also

generates an uncorrectable error flag for blocks with more than eight byte-errors. In addition, the CE6210 Reed-

Solomon decoder keeps a count of the number of uncorrectable blocks and the number of bit errors corrected. The

former will give an indication on the quality of the MPEG output and the latter provides the Bit Error Rate in QAM

demodulation.

The decoder packets are then descrambled to reverse the energy dispersal function introduced by the transmitter.

The output of the device is a stream of regularly spaced MPEG packets. The MPEG byte clock frequency is

automatically adapted to be the minimum needed for a given symbol rate and QAM constellation. Alternatively the

MPEG bytes can be clocked out using an externally provided byte clock. There is also an option for bit-serial

output.

Intel Corporation

CE6210

Data Sheet

Figure 3 - Typical CE6210 Application

Intel Corporation

CE6210

1.0

1.1

Data Sheet

Pin & Package Details

Pin Outline

Figure 4 below shows the pin functions of the CE6210.

Figure 4 - Pin Outline

1.2

Pin Allocation

Function

Vdd

CVdd

Gnd

SADD3

SADD2

IRQ

CVdd

Function

GPP0

SADD4

RESET

SLEEP

PLLTest

PLLVdd

Gnd

Vdd

RFLev

Gnd

CVdd

SADD1

SADD0

AGC2/GPP1

Function

MDO0

MDO1

MDO2

MDO3

MDO4

MDO5

Vdd

Table 1 - Pin Names - numeric

Intel Corporation

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WJCE6210882214 Related Products

	WJCE6210882214	DJCE6210882133
Description	Audio/Video Demodulator, AM, CMOS, 7 X 7 MM, LEAD FREE, LQFP-64	Audio/Video Demodulator, AM, CMOS, 7 X 7 MM, LQFP-64
Is it Rohs certified?	conform to	incompatible
Maker	Intel	Intel
Parts packaging code	QFP	QFP
package instruction	QCCN, QFP64,.47SQ,20	QCCN, QFP64,.47SQ,20
Contacts	64	64
Reach Compliance Code	compliant	compliant
Commercial integrated circuit types	AUDIO/VIDEO DEMODULATOR	AUDIO/VIDEO DEMODULATOR
Demodulation type	AM	AM
JESD-30 code	S-XQCC-N64	S-XQCC-N64
JESD-609 code	e3	e3
Number of functions	1	1
Number of terminals	64	64
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	QCCN	QCCN
Encapsulate equivalent code	QFP64,.47SQ,20	QFP64,.47SQ,20
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
power supply	1.8,3.3 V	1.8,3.3 V
Certification status	Not Qualified	Not Qualified
Maximum supply voltage (Vsup)	1.89 V	1.89 V
Minimum supply voltage (Vsup)	1.71 V	1.71 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	MATTE TIN	MATTE TIN
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED

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