TC4013BP/BF
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC4013BP,TC4013BF
TC4013B Dual D-Type Flip Flop
TC4013B contains two independent circuits of D type flip-flop.
The input level applied to DATA input are transferred to Q and
Q output by rising edge of the clock pulse. When SET input is
placed at “H”, and RESET input is placed at “L”, outputs become
Q = “H”, and Q = “L”. When RESET input is placed at “H”, and
SET input is placed at “L”, outputs become Q = “L”, and Q =
“H”. When both of RESET input and SET input are at “H”,
outputs become Q = “H” and Q = “H”.
TC4013BP
Pin Assignment
TC4013BF
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
: 0.96 g (typ.)
: 0.18 g (typ.)
Block Diagram
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2012-02-29
TC4013BP/BF
Truth Table
Inputs
RESET
L
H
H
L
L
L
SET
H
L
H
L
L
L
DATA
*
*
*
L
H
*
CKΔ
*
*
*
Outputs
Qn
+
1
H
L
H
L
H
Qn
½
Qn
+
1
L
H
H
H
L
Qn
½
*:
Don’t care
Δ:
Level change
½:
No change
Logic Diagram
Absolute Maximum Ratings (Note)
Characteristics
DC supply voltage
Input voltage
Output voltage
DC input current
Power dissipation
Operating temperature range
Storage temperature range
Symbol
V
DD
V
IN
V
OUT
I
IN
P
D
T
opr
T
stg
Rating
V
SS
−
0.5~V
SS
+
20
V
SS
−
0.5~V
DD
+
0.5
V
SS
−
0.5~V
DD
+
0.5
±10
300 (DIP)/180 (SOIC)
−40~85
−65~150
Unit
V
V
V
mA
mW
°C
°C
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
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2012-02-29
TC4013BP/BF
Operating Ranges
(V
SS
=
0 V) (Note)
Characteristics
DC supply voltage
Input voltage
Symbol
V
DD
V
IN
Test Condition
⎯
⎯
Min
3
0
Typ.
⎯
⎯
Max
18
V
DD
Unit
V
V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either V
DD
or V
SS
.
Static Electrical Characteristics
(V
SS
=
0 V)
Characteristics
Sym-
bol
Test Condition
V
DD
(V)
⎪I
OUT
⎪ <
1
μA
V
IN
=
V
SS
, V
DD
⎪I
OUT
⎪ <
1
μA
V
IN
=
V
SS
, V
DD
V
OH
=
4.6 V
V
OH
=
2.5 V
Output high current
I
OH
V
OH
=
9.5 V
V
OH
=
13.5 V
V
IN
=
V
SS
, V
DD
V
OL
=
0.4 V
Output low current
I
OL
V
OL
=
0.5 V
V
OL
=
1.5 V
V
IN
=
V
SS
, V
DD
V
OUT
=
0.5 V, 4.5 V
Input high voltage
V
IH
V
OUT
=
1.0 V, 9.0 V
V
OUT
=
1.5 V, 13.5 V
⎪I
OUT
⎪ <
1
μA
V
OUT
=
0.5 V, 4.5 V
Input low voltage
V
IL
V
OUT
=
1.0 V, 9.0 V
V
OUT
=
1.5 V, 13.5 V
⎪I
OUT
⎪ <
1
μA
Input
current
“H” level
“L” level
I
IH
I
IL
V
IH
=
18 V
V
IL
=
0 V
V
IN
=
V
SS
, V
DD
(Note)
18
18
5
10
15
⎯
⎯
⎯
⎯
⎯
0.1
−0.1
1
2
4
⎯
⎯
⎯
⎯
⎯
10
−
5
5
−40°C
Min
4.95
9.95
14.95
⎯
⎯
⎯
−0.61
−2.50
−1.50
−4.00
Max
⎯
⎯
⎯
0.05
0.05
0.05
⎯
⎯
⎯
⎯
Min
4.95
9.95
14.95
⎯
⎯
⎯
−0.51
−2.10
−1.30
−3.40
25°C
Typ.
5.00
10.00
15.00
0.00
0.00
0.00
−1.0
−4.0
−2.2
−9.0
Max
⎯
⎯
⎯
0.05
0.05
0.05
⎯
⎯
⎯
⎯
Min
85°C
Max
⎯
⎯
⎯
0.05
0.05
0.05
⎯
⎯
⎯
⎯
mA
V
V
Unit
5
10
15
5
10
15
5
5
10
15
4.95
9.95
14.95
⎯
⎯
⎯
−0.42
−1.70
−1.10
−2.80
High-level output
voltage
V
OH
Low-level output
voltage
V
OL
5
10
15
0.61
1.50
4.00
⎯
⎯
⎯
0.51
1.30
3.40
1.2
3.2
12.0
⎯
⎯
⎯
0.42
1.10
2.80
⎯
⎯
⎯
mA
5
10
15
3.5
7.0
11.0
⎯
⎯
⎯
3.5
7.0
11.0
2.75
5.50
8.25
⎯
⎯
⎯
3.50
7.00
11.00
⎯
⎯
⎯
V
5
10
15
⎯
⎯
⎯
1.5
3.0
4.0
⎯
⎯
⎯
2.25
4.50
6.75
1.5
3.0
4.0
⎯
⎯
⎯
1.5
3.0
4.0
V
0.1
−0.1
1
2
4
⎯
⎯
⎯
⎯
⎯
1.0
−1.0
30
60
120
−10
−
μA
0.002
0.004
0.008
Quiescent supply
current
I
DD
μA
Note: All valid input combinations.
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2012-02-29
TC4013BP/BF
Dynamic Electrical Characteristics
(Ta
=
25°C, V
SS
=
0 V, C
L
=
50 pF)
Characteristics
Symbol
Test Condition
V
DD
(V)
5
t
TLH
⎯
10
15
5
t
THL
⎯
10
15
t
pLH
t
pHL
5
⎯
10
15
5
t
pLH
⎯
10
15
5
t
pHL
⎯
10
15
5
Max clock frequency
f
CL
⎯
10
15
Max clock input rise time
Max clock input fall time
t
rCL
t
fCL
5
⎯
10
15
5
t
W
⎯
10
15
5
Min clock pulse width
t
W
⎯
10
15
Min set-up time
(DATA-CK)
5
t
su
⎯
10
15
5
t
H
⎯
10
15
5
t
rem
⎯
10
15
C
IN
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
60
30
25
60
30
25
⎯
⎯
⎯
20
10
6
⎯
⎯
⎯
5
180
80
50
140
60
40
40
20
15
40
20
15
40
20
15
7.5
pF
ns
ns
ns
ns
ns
No limit
μs
Min
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
3.5
8.0
12.0
Typ.
70
35
30
70
35
30
130
65
50
110
50
40
110
50
40
8
16
20
Max
200
100
80
200
100
80
300
130
90
300
130
90
300
130
90
⎯
⎯
⎯
MHz
ns
ns
ns
ns
ns
Unit
Output transition time
(low to high)
Output transition time
(high to low)
Propagation delay time
(CK-Q,
Q
)
Propagation delay time
(SET, RESET-Q,
Q
)
Propagation delay time
(SET, RESET-Q,
Q
)
Min pulse width
(SET, RESET)
Min hold time
(DATA-CK)
Min removal time
(SET, RESET-CK)
Input capacitance
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2012-02-29
TC4013BP/BF
Waveform for Measurement of Dynamic Characteristics
Waveform 1
Waveform 2
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2012-02-29
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