LP24-44-15.0M-20F1CB datasheet, PDF

Datasheet> All Categories > Passive components> Crystal/resonator> LP24-44-15.0M-20F1CB

LP24-44-15.0M-20F1CB: DescriptionParallel - Fundamental Quartz Crystal, 15MHz Nom, ROHS COMPLIANT PACKAGE-2; CategoryPassive components Crystal/resonator; File Size92KB，6 Pages; ManufacturerPletronics; Environmental Compliance

Download Datasheet Parametric View All

LP24-44-15.0M-20F1CB Overview

Parallel - Fundamental Quartz Crystal, 15MHz Nom, ROHS COMPLIANT PACKAGE-2

LP24-44-15.0M-20F1CB Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Pletronics
package instruction	ROHS COMPLIANT PACKAGE-2
Reach Compliance Code	compliant
Other features	AT-CUT CRYSTAL; BULK
Ageing	5 PPM/YEAR
Crystal/Resonator Type	PARALLEL - FUNDAMENTAL
Drive level	1000 µW
frequency stability	0.002%
frequency tolerance	20 ppm
JESD-609 code	e3
load capacitance	44 pF
Manufacturer's serial number	LP24
Installation features	THROUGH HOLE MOUNT
Nominal operating frequency	15 MHz
Maximum operating temperature	45 °C
Minimum operating temperature
physical size	L10.8XB4.47XH2.5 (mm)/L0.425XB0.176XH0.098 (inch)
Series resistance	50 Ω
surface mount	NO
Terminal surface	Matte Tin (Sn)

Preview

Download Datasheet

View All

LP21 / LP24 / LP49 Series

Low Profile Crystal

February 2010

• The Pletronics’ LP49 Series is a low profile

thru-hole crystal

• Bulk packaging

• 3 MHz to 70 MHz

• HC-49/US

• AT Cut Crystal

LP21 0.082 (2.10mm) high

LP24 0.100 (2.50mm) high

LP49 0.140 (3.56mm) high

Pletronics Inc. certifies this device is in accordance with the

RoHS (2002/95/EC) and WEEE (2002/96/EC) directives.

Pletronics Inc. guarantees the device does not contain the following:

Cadmium, Hexavalent Chromium, Lead (<1000 ppm), Mercury, PBB’s, PBDE’s

Weight of the Device: 0.62 grams

Moisture Sensitivity Level: 1 As defined in J-STD-020C

Second Level Interconnect code: e1, e2 or e3

Electrical Specification:

Item

Frequency Range

Calibration Frequency Tolerance

Frequency Stability over OTR

Equivalent Series Resistance

(ESR)

Min

Drive Level

Shunt Capacitance

Aging per year

Specified Temperature Range

Storage Temperature Range

(C0)

-5

-40

-55

Max

200

150

120

100

+85

+125

Unit

MHz

ppm

Ohms

ppm

Condition

AT cut

at +25

C + 3

see table on page 3 for

available options

LP49

LP49/LP24

LP49/LP24/LP21

Overtone

Fundamental

3 MHz to 4 MHz

4 MHz to 5 MHz

5 MHz to 6 MHz

6 MHz to 7 MHz

7 MHz to 9 MHz

9 MHz to 10 MHz

10 MHz to 13 MHz

13 MHz to 15 MHz

15 MHz to 27 MHz

27 MHz to 30 MHz

27 MHz to 32 MHz

32 MHz to 50 MHz

50 MHz to 70 MHz

use 10 µW for testing

Pad to Pad capacitance

at +25

C + 3

see table on page 3 for available options

Product information is current as of publication date. The product conforms

to specifications per the terms of the Pletronics limited warranty. Production

processsing does not necessarily include testing of all parameters.

Recommended Resources

AC and DC inflow automatic switching circuit diagram

Touch delay switch circuit

Over-temperature and cooling alarm circuit

Voice controlled bird singing lantern circuit (555, KD-5602)

LM Flash programmer cannot be used after installation: After downloading and installing TI's programmer software, click the icon to run it, and the "0xxxxxxxxxxx" instruction references the "0x0xxxxxxxxx" memory, which cannot be read.In this case, you can...; colarence Microcontroller MCU

The schematic diagram is correct but the result is wrong. Please help me.: As the title says, the schematic and rule check are correct, but the production PCB has many wires that are not connected. Can I connect them myself?...; freeNathaniel PCB Design

Notice on organizing the 2009 National Undergraduate Electronic Design Competition: [i=s]This post was last edited by paulhyde on 2014-9-15 09:35[/i][size=4][b][color=red]Introduction:[/color][/b]The National Undergraduate Electronic Design Competition (2009-2012) Organizing Committe...; open82977352 Electronics Design Contest

How to use synplify to synthesize a project with a core generator to generate IP?: I used synplify to synthesize a project with an ISE IP core, added properties to make it a black box, and when I checked it in synplify, it was successfully synthesized as a black box, as shown in the...; eeleader FPGA/CPLD

Please help me find where is the error in this code: module example1(equal); output equal; reg a,b; reg equal; initial begin a=0; b=0;#100 a=0;b=1; #100 b=1;b=1; #100 a=1;b=0; #100 $stop; end compare compare1(equal,a,b); endmodule module compare(equal,a...; 瓷娃娃 FPGA/CPLD

How to control 64 LEDs?: [size=4]As the title says, how to control 64 LEDs? ? ? [/size] [size=4]The question is as follows: [/size] [size=6][color=#ff0000]Control 64 PWM channels to control the brightness of LEDs. [/color][/s...; 574433742 Programming Basics

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components