SN54HC393, SN74HC393
DUAL 4 BIT BINARY COUNTERS
SCLS143D − DECEMBER 1982 − REVISED JULY 2003
D
D
D
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-µA Max I
CC
Typical t
pd
= 13 ns
±4-mA
Output Drive at 5 V
Low Input Current of 1
µA
Max
Dual 4-Bit Binary Counters With Individual
Clocks
Direct Clear for Each 4-Bit Counter
Can Significantly Improve System
Densities by Reducing Counter Package
Count by 50 Percent
SN54HC393 . . . J OR W PACKAGE
SN74HC393 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1CLK
1CLR
1Q
A
1Q
B
1Q
C
1Q
D
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
2CLK
2CLR
2Q
A
2Q
B
2Q
C
2Q
D
SN54HC393 . . . FK PACKAGE
(TOP VIEW)
description/ordering information
The ’HC393 devices contain eight flip-flops and
additional gating to implement two individual 4-bit
counters in a single package. These devices
comprise two independent 4-bit binary counters,
each having a clear (CLR) and a clock (CLK)
input. N-bit binary counters can be implemented
with each package, providing the capability of
divide by 256. The ’HC393 devices have parallel
outputs from each counter stage so that any
submultiple of the input count frequency is
available for system timing signals.
ORDERING INFORMATION
TA
PDIP − N
PACKAGE†
Tube of 25
Tube of 50
SOIC − D
−40 C 85°C
−40°C to 85 C
SOP − NS
SSOP − DB
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 90
TSSOP − PW
CDIP − J
−55 C 125°C
−55°C to 125 C
CFP − W
Reel of 2000
Reel of 250
Tube of 25
Tube of 150
ORDERABLE
PART NUMBER
SN74HC393N
SN74HC393D
SN74HC393DR
SN74HC393DT
SN74HC393NSR
SN74HC393DBR
SN74HC393PW
SN74HC393PWR
SN74HC393PWT
SNJ54HC393J
SNJ54HC393W
1CLR
1CLK
NC
V
CC
2CLK
1Q
A
NC
1Q
B
NC
1Q
C
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
2CLR
NC
2Q
A
NC
2Q
B
NC − No internal connection
LCCC − FK
Tube of 55
SNJ54HC393FK
SNJ54HC393FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
Copyright
2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1Q
D
GND
NC
2Q
D
2Q
C
TOP-SIDE
MARKING
SN74HC393N
HC393
HC393
HC393
HC393
SNJ54HC393J
SNJ54HC393W
1
SN54HC393, SN74HC393
DUAL 4 BIT BINARY COUNTERS
SCLS143D − DECEMBER 1982 − REVISED JULY 2003
FUNCTION TABLE COUNT SEQUENCE
(each counter)
OUTPUTS
COUNT
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
QD
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
QC
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
QB
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
QA
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
logic diagram, each counter (positive logic)
CLR
CLK
R
QA
T
R
QB
T
R
QC
T
R
QD
T
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SN54HC393, SN74HC393
DUAL 4 BIT BINARY COUNTERS
SCLS143D − DECEMBER 1982 − REVISED JULY 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±20
mA
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±20
mA
Continuous output current, I
O
(V
O
= 0 to V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±25
mA
Continuous current through V
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±50
mA
Package thermal impedance,
θ
JA
(see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC393
MIN
VCC
VIH
Supply voltage
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VIL
VI
VO
∆t/∆v
†
Low-level input voltage
Input voltage
Output voltage
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 4.5 V
VCC = 6 V
0
0
2
1.5
3.15
4.2
0.5
1.35
1.8
VCC
VCC
1000
500
400
0
0
NOM
5
MAX
6
SN74HC393
MIN
2
1.5
3.15
4.2
0.5
1.35
1.8
VCC
VCC
1000
500
400
ns
V
V
V
V
NOM
5
MAX
6
UNIT
V
High-level input voltage
Input transition rise/fall time
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
† If this device is used in the threshold region (from VILmax = 0.5 V to VIHmin = 1.5 V), there is a potential to go into the wrong state from induced
grounding, causing double clocking. Operating with the inputs at tt = 1000 ns and VCC = 2 V does not damage the device; however, functionally,
the CLK inputs are not ensured while in the shift, count, or toggle operating modes.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
SN54HC393, SN74HC393
DUAL 4 BIT BINARY COUNTERS
SCLS143D − DECEMBER 1982 − REVISED JULY 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
2V
IOH = −20
µA
VOH
VI = VIH or VIL
IOH = −4 mA
IOH = −5.2 mA
IOL = 20
µA
VOL
VI = VIH or VIL
IOL = 4 mA
IOL = 5.2 mA
II
ICC
Ci
VI = VCC or 0
VI = VCC or 0,
IO = 0
4.5 V
6V
4.5 V
6V
2V
4.5 V
6V
4.5 V
6V
6V
6V
2 V to 6 V
3
TA = 25°C
MIN
TYP
MAX
1.9
4.4
5.9
3.98
5.48
1.998
4.499
5.999
4.3
5.8
0.002
0.001
0.001
0.17
0.15
±0.1
0.1
0.1
0.1
0.26
0.26
±100
8
10
SN54HC393
MIN
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±1000
160
10
MAX
SN74HC393
MIN
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1000
80
10
nA
µA
pF
V
V
MAX
UNIT
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
VCC
2V
fclock
Clock frequency
4.5 V
6V
2V
CLK high or low
tw
Pulse duration
CLR high
4.5 V
6V
2V
4.5 V
6V
2V
tsu
Setup time, CLR inactive
4.5 V
6V
80
16
14
80
16
14
25
5
5
TA = 25°C
MIN
MAX
6
31
36
120
24
20
120
24
20
25
5
5
SN54HC393
MIN
MAX
4.2
21
25
100
20
18
100
20
18
25
5
5
ns
ns
SN74HC393
MIN
MAX
5
25
28
MHz
UNIT
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SN54HC393, SN74HC393
DUAL 4 BIT BINARY COUNTERS
SCLS143D − DECEMBER 1982 − REVISED JULY 2003
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
2V
fmax
CLK
QA
4.5 V
6V
2V
QA
4.5 V
6V
2V
QB
tpd
CLK
QC
4.5 V
6V
2V
4.5 V
6V
2V
QD
4.5 V
6V
2V
tPHL
CLR
Any
4.5 V
6V
2V
tt
Any
4.5 V
6V
TA = 25°C
MIN
TYP
MAX
6
31
36
10
50
60
50
15
13
72
22
18
91
28
22
100
32
24
45
17
14
28
8
6
120
24
20
190
38
32
240
48
41
290
58
50
165
33
28
75
15
13
SN54HC393
MIN
4.2
21
25
180
36
31
285
57
48
360
72
61
430
87
74
250
49
42
110
22
19
MAX
SN74HC393
MIN
5
25
28
150
30
26
240
47
40
300
60
51
360
72
62
205
41
35
95
19
16
ns
ns
ns
MHz
MAX
UNIT
operating characteristics, T
A
= 25°C
PARAMETER
Cpd
Power dissipation capacitance per counter
TEST CONDITIONS
No load
TYP
40
UNIT
pF
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
5
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