UC1886J datasheet, PDF - EEWORLD Datasheet

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UC1886J: DescriptionSwitching Controller, Current-mode, 1.5A, 300kHz Switching Freq-Max, BIPolar, CDIP16,; CategoryPower/power management The power supply circuit; File Size278KB，7 Pages; ManufacturerUnitrode Corporation

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UC1886J Overview

Switching Controller, Current-mode, 1.5A, 300kHz Switching Freq-Max, BIPolar, CDIP16,

UC1886J Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Unitrode Corporation
package instruction	DIP, DIP16,.3
Reach Compliance Code	unknown
Analog Integrated Circuits - Other Types	SWITCHING CONTROLLER
control mode	CURRENT-MODE
Control Technology	PULSE WIDTH MODULATION
Maximum input voltage	20 V
Minimum input voltage	10.3 V
Nominal input voltage	12 V
JESD-30 code	R-CDIP-T16
JESD-609 code	e0
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Maximum output current	1.5 A
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum supply current (Isup)	15 mA
surface mount	NO
Switch configuration	SINGLE
Maximum switching frequency	300 kHz
technology	BIPOLAR
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED

UC1886J Preview

UC1886

UC2886

UC3886

Average Current Mode PWM Controller IC

FEATURES

•

10.3V - 20V Operating Range

•

Low Offset Voltage Amplifier

•

High Bandwidth Current and Voltage

Amplifiers

•

Low Offset Current Sense

•

Undervoltage Lockout

•

Trimmed 5 Volt Reference

•

Externally Programmable Oscillator

Charge Current

•

1.5A Peak Totem Pole Output

•

Available in 16-pin DIL or SOIC

Packages

Amplifier

DESCRIPTION

The UC3886 family of PWM controller ICs is designed for DC-to-DC con-

verters with average current mode control. It is designed for use in con-

junction with the UC3910 4-bit DAC and Voltage Monitor. The UC3886

drives an external N-channel MOSFET and can be used to power the In-

tel Pentium® Pro and other high-end microprocessors.

The UC3886 in conjunction with the UC3910 converts 5VDC to an adjust-

able output ranging from 2.0V to 3.5V in 100mV steps with 35mV DC sys-

tem accuracy.

The oscillator is programmed by the user’s selection of an external resis-

tor and capacitor, and is designed for 300kHz typical operation.

The voltage and current amplifiers have 3.5MHz gain-bandwidth product

to satisfy high performance system requirements.

The internal current sense amplifier permits the use of a low value current

sense resistor, minimizing power loss. It has inputs and outputs accessi-

ble to allow user-selection of gain-setting resistors, and is internally com-

pensated for a gain of 5 and above. The command voltage input is

buffered and provided for use as the reference for the current sense am-

plifier.

The output of the voltage amplifier (input to the current amplifier) is

clamped to 1 volt above the command voltage to serve as a current limit.

The gate output can be disabled by bringing the CAO/ENBL pin to below

0.8 volts.

BLOCK DIAGRAM

UDG-95098-2

6/98

UC1886

UC2886

UC3886

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V

Output Current

CAM, COMMAND, VSENSE, ISN, ISP . . . . . . . . . . . . . ± 1A

Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 7V

Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . –55°C to +150°C

Lead Temperatue (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C

CONNECTION DIAGRAM

DIL-16, SOIC-16 (Top View)

J, N, or D Packages

Currents are positive into, negative out of the specified terminal.

Consult Packaging Section of Databook for thermal limitations

and considerations of packages.

ELECTRICAL CHARACTERISTICS

Unless otherwise specified, VCC = 12V, V

COMMAND

= 3.0V, CT = 1nF, RT = 10k,

= T

= 0°C < T

< 70°C for the UC3886

(Note: –25°C < T

< 85°C for the UC2886, and –55°C < T

< 125°C for the UC1886)

PARAMETER

Overall

Supply Current

Undervoltage Lockout

Start Threshold

UVLO Hysteresis

Voltage Error Amplifier

Input Offset Voltage

Input Bias Current

Input Offset Current

Open Loop Gain

Common-Mode Rejection Ratio

Power Supply Rejection Ratio

Output High Voltage (Clamp)

Output Low Voltage (Clamp)

Output Sink Current

Output Source Current

Gain-Bandwidth Product

5.0V Reference

Output Voltage

Total Variation

Line Regulation

Load Regulation

Short Circuit Current

VREF

= 1.0mA

Line, Load, Temperature

11V < VCC < 15V

0 < I

VREF

< 2mA

–10

4.9

4.825

5.1

5.175

−40

= 3.0V (UC3886)

= 3.0V (UC2886, UC1886)

= 3.0V

= 3.0V (UC3886)

= 3.0V (UC2886, UC1886)

2.5V < V

COMP

< 3.5V

2V < V

COMP

< 4V

11V < VCC < 15V

COMP

= –100µA (UC3886)

COMP

= –100µA (UC2886, UC1886)

COMP

= 100µA

COMP

= 3.7V

COMP

= 2.8V

F = 100kHz

3.95

3.9

1.9

0.9

–0.15

−0.25

3.5

4.05

4.1

2.7

−2

0.01

0.1

µA

MHz

9.7

10.3

0.25

10.8

0.4

VCC = 11V, Gate Open

VCC = 9.3V

TEST CONDITIONS

MIN

TYP

MAX

UNITS

UC1886

UC2886

UC3886

ELECTRICAL CHARACTERISTICS

Unless otherwise specified, VCC = 12V, V

COMMAND

= 3.0V, CT = 1nF, RT = 10k,

= T

= 0°C < T

< 70°C for the UC3886

(Note: –25°C < T

< 85°C for the UC2886, and –55°C < T

< 125°C for the UC1886)

PARAMETER

Input Buffer

Gain

Current-Sense Amplifier

Input Offset Voltage

Input Bias Current

Input Offset Current

Open Loop Gain

CMRR

PSRR

Output High Voltage

Output Low Voltage

Output Source Current

Gain-Bandwidth Product

Current Amplifier

Input Offset Voltage

Input Bias Current

Open Loop Gain

CMRR

PSRR

Output High Voltage

Output Low Voltage

Output Source Current

Gain-Bandwidth Product

Oscillator

Frequency

Frequency Change With Voltage

CT Peak Voltage

CT Valley Voltage

CT Peak-to-Peak Voltage

Output Section

Output Low Voltage

Output High Voltage

Output Low Voltage

Rise/Fall Time

Maximum Duty Cycle

GATE

= 200mA

GATE

= –200mA

5V < VCC < 9V, I

GATE

= 10mA

CAO

< 0.8V, I

GATE

= 10mA

= 1nF

(UC3886)

(UC2886, UC1886)

1.6

10.3

0.5

150

2.2

1.6

RT = 10k, CT = 1nF (UC3886)

RT = 10k, CT = 1nF (UC2886, UC1886)

11V > VCC > 15V

2.6

2.8

1.8

1.2

2.0

100

110

115

kHz

= 3.0V (UC3886)

= 3.0V (UC2886, UC1886)

= 3.0V

1V < V

CAO

< 3V

1.5V < V

< 4.5V

11V < VCC < 15V

CAO

= –100µA

CAO

= 100µA

CAO

=1V

F = 100kHz

−0.1

–0.25

3.5

3.3

µA

MHz

= 3.0V (UC3886)

= 3.0V (UC2886, UC1886)

= 3.0V

2V < V

ISO

< 6V

0V < V

< 4.5V

11V < VCC < 15V

ISO

= –100µA

ISO

= 1mA

ISO

= 2V

F = 100kHz

−0.2

3.5

-1

0.2

µA

MHz

BUF

= ± 500µA (UC3886)

BUF

= ± 500µA (UC2886, UC1886)

0.98

0.95

1.02

1.05

V/V

TEST CONDITIONS

MIN

TYP

MAX

UNITS

PIN DESCRIPTIONS

BUF:

(Buffer Output) The voltage on COMMAND pin is

buffered and presented to the user here. This voltage is

used to provide the operating bias point for the current

sense amplifier by connecting a resistor between BUF

and ISP. Decouple BUF with 0.01µF or greater to SGND.

CAM:

(Current Amplifier Minus Input) The average load

current feedback from ISO is typically applied through a

resistor here.

CAO/ENBL:

(Current Amplifier Output/Chip Enable) The

current loop compensation network is connected be-

tween CAO/ENBL and CAM, the inverting input of the

current amplifier. The voltage at CAO/ENBL is the input

to the PWM comparator and regulates the output voltage

of the system. The GATE output is disabled (held low)

unless the voltage at this pin exceeds 1.0 volts, allowing

the PWM to force zero duty cycle when necessary. The

user can force this pin below 0.8 volts externally with an

open collector, disabling the GATE drive.

COMMAND:

(Voltage Amplifier Non-Inverting Input) This

input to the voltage amplifier is connected to a command

voltage, such as the output of a DAC. This voltage sets

the switching regulator output voltage.

COMP:

(Compensation, Voltage Amplifier Output) The

system voltage compensation network is applied be-

tween COMP and VSENSE. The voltage at COMP is

clamped to prevent it from going more than 1V above the

COMMAND voltage. This is used to provide an accurate

average current limit. The voltage on COMP is also

clamped to 0.7V below the voltage on COMMAND. This

is done to avoid applying a full charge to capacitors in

the compensation network during transients, allowing

quick recovery time and little overshoot.

CT:

(Oscillator Timing Capacitor) A capacitor from CT to

SGND along with the resistor on RT, sets the PWM fre-

quency and maximum duty cycle according to these

formulas:

UC1886

UC2886

UC3886

GATE:

(PWM Output) The output is a 1A totem pole

driver. Use a series resistor of at least 5Ω to prevent in-

teraction between the gate impedance and the output

driver that might cause excessive overshoot.

ISN:

(Current Sense Amplifier Inverting Input) A resistor

to the low side of the average current sense resistor and

a resistor to ISO are applied to this pin to make a differ-

ential sensing amplifier.

ISO:

(Current Sense Amplifier Output) A feedback resis-

tor to ISN is connected here to make a differential

sensing amplifier. The voltage at this pin is equal to

BUF

+ A • I

AVG

• R

SENSE

) where A is the user deter-

mined gain of the differential amplifier, I

AVG

is the

average load current of the system, and R

SENSE

is the

average current sensing resistor. For stability, A must be

greater than 5. Set A such that A • I

• R

SENSE

= 1.0V

where ISC is the user-determined short circuit current

limit.

ISP:

(Current Sense Amplifier Non-Inverting Input) A re-

sistor to the high side of the average current sense

resistor and a resistor to BUF are connected to this pin

to make a differential sensing amplifier.

PGND:

(Power Ground) The PWM output current returns

to ground through this pin. This is separated from SGND

to avoid on-chip ground noise generated by the output

current.

RT:

(Oscillator Charging Current) This pin is held at 2V.

Resistor RT from this pin to SGND sets the oscillator

charging current. Use 5k < RT < 100k.

SGND:

(Signal Ground) For better noise immunity, sig-

nal ground is provided at this pin.

VCC:

(Positive Supply Voltage) This pin supplies power

to the chip and to the gate drive output. Decouple to

PGND and separately to SGND for best noise immunity.

The reference (VREF), GATE output, oscillator, and am-

plifiers are disabled until VCC exceeds 10.3V.

VREF:

(Voltage Reference Output) An accurate 5V refer-

ence as provided at this pin. The output can deliver 2mA

to external circuitry, and is internally short circuit current

limited. VREF is disabled if VCC is below UVLO. Bypass

5V REF to SGND with an 0.01µF or larger capacitor for

best stability.

VSENSE:

(Voltage Sense Input) This input is connected

to COMP through a feedback network and to the power

supply output through a resistor or a divider network.

MAX

•

4. 0

2. 0

where D

MAX

is the maximum operating duty cycle, and

RT is in ohms.

OSC

2. 0

•

(

4. 0

•

)

2 . 0

)

•

1. 8

•

4. 0

where F

OSC

is the UC3886 oscillator switching fre-

quency in Hz, RT is in ohms, and CT is in farads.

UC1886

UC2886

UC3886

APPLICATION INFORMATION

OSCILLATOR

The UC3886 oscillator is a saw tooth. The rising edge

is governed by a current controlled by RT flowing into

the capacitor CT. The falling edge of the sawtooth sets

the dead time for the output. Selection of RT should be

done first, based on desired maximum duty cycle. CT

can then be chosen based on the desired frequency,

, and the value of RT. The design equations are:

1.00

0.98

0.96

DMAX

0.94

0.92

0.90

0.88

Ω

)

100

120

MAX

OSC

•

4. 0

2 . 0

•

(

4 . 0

•

)

2 . 0

)

•

1. 8

•

4. 0

2. 0

Figure 2. Programming Maximum Duty Cycle with R

1000

FSWITCH (kHz)

100

100pF

220pF

470pF

UDG-96022

RT (k

Ω

)

1nF

100

Figure 1. Oscillator

Configuring the Current Sense Amplifier

The UC3886 Current Sense Amplifier is used to amplify

a differential current sense signal across a low value

current sense resistor, R

SENSE.

This amplifier must be

set up as a differential amplifier as shown.

The Current Sense Amplifier gain, G

CSA

, is given by the

ratio of R2/R1. The output of the Current Sense Ampli-

fier at the ISO pin is given by

TD (us)

Figure 3. Programming Switching Frequency with C

0.600

0.500

0.400

0.300

0.200

0.100

0.000

100

300

500

700

900

1100

RT = 5k

RT = 100k

ISO

BUF

SENSE

•

The Current Sense Amplifier gain, G

CSA

, must be pro-

grammed to be greater than or equal to 5.0 (14dB), as

this amplifier is not stable with gain below 5.0. The Cur-

rent Sense Amplifier gain is limited on the high side by

its Gain-Bandwidth product of 2.5MHz. Therefore G

CSA

must be programmed between

CSA_MIN

= 5.0

and

CSA_MAX

= 2.5MHz/F

SWITCH

CT (pF)

Figure 4. Deadtime vs. C

and R

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