74VHC00 — Quad 2-Input NAND Gate
February 2008
74VHC00
Quad 2-Input NAND Gate
Features
■
High Speed: t
PD
=
3.7ns (typ.) at T
A
=
25°C
■
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(min.)
■
Power down protection is provided on all inputs
■
Low noise: V
OLP
=
0.8V (max)
■
Low power dissipation: I
CC
=
2µA (max.) at T
A
=
25°C
■
Pin and function compatible with 74HC00
General Description
The VHC00 is an advanced high-speed CMOS 2-Input
NAND Gate fabricated with silicon gate CMOS technol-
ogy. It achieves the high-speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. The internal circuit is com-
posed of 3 stages, including buffer output, which provide
high noise immunity and stable output. An input protec-
tion circuit insures that 0V to 7V can be applied to the
input pins without regard to the supply voltage. This
device can be used to interface 5V to 3V systems and
two supply systems such as battery backup. This circuit
prevents device destruction due to mismatched supply
and input voltages.
Ordering Information
Order Number
74VHC00M
74VHC00SJ
74VHC00MTC
74VHC00N
Package
Number
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1992 Fairchild Semiconductor Corporation
74VHC00 Rev. 1.3.0
www.fairchildsemi.com
74VHC00 — Quad 2-Input NAND Gate
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
T
STG
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
DC V
CC
/ GND Current
Storage Temperature
Parameter
Rating
–0.5V to +7.0V
–0.5V to +7.0V
–0.5V to V
CC
+ 0.5V
–20mA
±20mA
±25mA
±50mA
–65°C to +150°C
260°C
Lead Temperature (Soldering, 10 seconds)
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IN
V
OUT
T
OPR
t
r
, t
f
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time,
V
CC
=
3.3V ± 0.3V
V
CC
=
5.0V ± 0.5V
Parameter
Rating
2.0V to +5.5V
0V to +5.5V
0V to V
CC
–40°C to +85°C
0ns/V
∼
100ns/V
0ns/V
∼
20ns/V
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1992 Fairchild Semiconductor Corporation
74VHC00 Rev. 1.3.0
www.fairchildsemi.com
3
74VHC00 — Quad 2-Input NAND Gate
DC Electrical Characteristics
T
A
=
25°C
Symbol
V
IH
V
IL
V
OH
T
A
=
–40°C to
+85°C
Max.
Min.
1.50
0.7 x V
CC
0.50
0.3 x V
CC
0.50
0.3 x V
CC
1.9
2.9
4.4
2.48
3.80
V
V
Parameter
HIGH Level Input
Voltage
LOW Level Input
Voltage
HIGH Level
Output Voltage
V
CC
(V)
2.0
3.0–5.5
2.0
3.0–5.5
2.0
3.0
4.5
3.0
4.5
Conditions
Min.
1.50
0.7 x V
CC
Typ.
Max.
Units
V
V
IN
=
V
IH
or V
IL
I
OH
=
–50µA
1.9
2.9
4.4
2.0
3.0
4.5
I
OH
=
–4mA
I
OH
=
–8mA
V
IN
=
V
IH
or V
IL
I
OL
=
50µA
2.58
3.94
0.0
0.0
0.0
0.1
0.1
0.1
0.36
0.36
±0.1
2.0
V
OL
LOW Level
Output Voltage
2.0
3.0
4.5
3.0
4.5
0.1
0.1
0.1
0.44
0.44
±1.0
20.0
V
I
OL
=
4mA
I
OL
=
8mA
V
IN
=
5.5V or GND
V
IN
=
V
CC
or GND
I
IN
I
CC
Input Leakage
Current
Quiescent
Supply Current
0–5.5
5.5
µA
µA
Noise Characteristics
T
A
=
25°C
Symbol
V
OLP(2)
V
OLV(2)
V
IHD(2)
V
ILD(2)
Parameter
Quiet Output Maximum
Dynamic V
OL
Quiet Output Minimum
Dynamic V
OL
Minimum HIGH Level
Dynamic Input Voltage
Maximum LOW Level
Dynamic Input Voltage
V
CC
(V)
5.0
5.0
5.0
5.0
Conditions
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
Typ.
0.3
–0.3
Limits
0.8
–0.8
3.5
1.5
Units
V
V
V
V
Note:
2. Parameter guaranteed by design.
©1992 Fairchild Semiconductor Corporation
74VHC00 Rev. 1.3.0
www.fairchildsemi.com
4
74VHC00 — Quad 2-Input NAND Gate
AC Electrical Characteristics
T
A
=
25°C
Symbol
t
PLH
, t
PHL
T
A
=
–40°C
to +85°C
Min.
1.0
1.0
1.0
1.0
Parameter
Propagation Delay
V
CC
(V)
3.3 ± 0.3
5.0 ± 0.5
Conditions
C
L
=
15pF
C
L
=
50pF
C
L
=
15pF
C
L
=
50pF
V
CC
=
Open
(3)
Min.
Typ.
5.5
8.0
3.7
5.2
4
19
Max.
7.9
11.4
5.5
7.5
10
Max.
9.5
13.0
6.5
8.5
10
Units
ns
ns
pF
pF
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
Note:
3. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load. Average operating current can be obtained by the equation:
I
CC
(opr.)
=
C
PD
• V
CC
• f
IN
+ I
CC
/ 4 (per gate).
©1992 Fairchild Semiconductor Corporation
74VHC00 Rev. 1.3.0
www.fairchildsemi.com
5
京公网安备 11010802033920号
EEWORLD
