Philips Semiconductors
Product specification
512 x 8-bit CMOS EEPROMS with
I
2
C-bus interface
FEATURES
•
Low power CMOS
– maximum active current 2.5 mA
– maximum standby current 10
µA
(at 6.0 V),
typical 4
µA
•
Non-volatile storage of 4-Kbits organized as two pages
of 256
×
8-bits each
•
Single supply with full operation down to 2.5 V
•
On-chip voltage multiplier
•
Serial input/output I
2
C-bus
•
Write operations
– byte write mode
– 8-byte page write mode
(minimizes total write time per byte)
•
Write-protection input
•
Read operations
– sequential read
– random read
•
Internal timer for writing (no external components)
•
Power-on reset
•
High reliability by using a redundant storage code
(single bit error correction)
•
Endurance
– >500 k E/W-cycles at T
amb
= 22
°C
•
40 years non-volatile data retention time (typ.)
•
Pin and address compatible to
– PCX8582X-2 Family and PCX8598X-2 Family.
DESCRIPTION
PCX8594X-2 Family
The PCX8594X-2 is a 4-Kbit (512
×
8-bit) floating gate
electrically erasable programmable read only memory
(EEPROM). By using an internal redundant storage code
it is fault tolerant to single bit errors. This feature
dramatically increases reliability compared to conventional
EEPROM memories.
Power consumption is low due to the full CMOS
technology used. The programming voltage is generated
on-chip, using a voltage multiplier.
As data bytes are received and transmitted via the serial
I
2
C-bus, a package using eight pins is sufficient. Up to four
PCX8594X-2 devices may be connected to the I
2
C-bus.
Chip select is accomplished by two address inputs
(A1 and A2).
Timing of the ERASE/WRITE cycle is carried out
internally, thus no external components are required. Pin 7
(PTC) must be connected to either V
DD
or left open-circuit.
There is an option of using an external clock for timing the
length of an ERASE/WRITE cycle.
A write-protection input at pin 1 (WP) allows disable of
write-commands from the master by a hardware signal.
When pin 1 is HIGH and one of the upper 256 EEPROM
cells is addressed, then the data bytes will not be
acknowledged by the PCX8594X-2 and the EEPROM
contents are not changed.
QUICK REFERENCE DATA
SYMBOL
V
DD
I
DDR
PARAMETER
supply voltage
supply current READ
f
SCL
= 100 kHz
V
DD
= 3 V
V
DD
= 6 V
I
DDW
supply current ERASE/WRITE
f
SCL
= 100 kHz
V
DD
= 3 V
V
DD
= 6 V
I
DDSB
supply current STANDBY
V
DD
= 3 V
V
DD
= 6 V
−
−
−
−
0.8
2.5
3.5
10
mA
mA
µA
µA
−
−
60
200
µA
µA
CONDITIONS
MIN.
2.5
MAX.
6.0
V
UNIT
December 1994
2
Philips Semiconductors
Product specification
512 x 8-bit CMOS EEPROMS with
I
2
C-bus interface
ORDERING INFORMATION
TYPE
NUMBER
PCF8594C-2P
PCD8594D-2P
PCF8594E-2P
PCA8594F-2P
PCF8594C-2T
PCD8594D-2T
PCF8594E-2T
PCA8594F-2T
DEVICE SELECTION
Table 1
Device selection code
DEVICE CODE
b7
(1)
1
b6
0
b5
1
b4
0
b3
A2
SO8
plastic small outline
package;
8 leads; body width 3.9 mm
SOT96-1
PACKAGE
NAME
DIP8
DESCRIPTION
plastic dual in-line package;
8 leads (300 mil)
VERSION
SOT97-1
PCX8594X-2 Family
TEMPERATURE (°C)
MIN.
−40
−25
−40
−40
−40
−25
−40
−40
MAX.
+85
+70
+85
+125
+85
+70
+85
+125
SUPPLY (V)
MIN.
2.5
3.0
4.5
4.5
2.5
3.0
4.5
4.5
MAX.
6.0
6.0
5.5
5.5
6.0
6.0
5.5
5.5
SELECTION
Bit
Device
Note
1. The MSB b7 is sent first.
Table 2
CHIP ENABLE
b2
A1
b1
MEM
SEL
R/W
b0
R/W
Endurance and data retention guarantees
DEVICE
ENDURANCE E/W CYCLES
500000
(1)
DATA RETENTION YEARS
40
PCF8594C-2; PCA8594F-2
Note
1. At the time of publication of this data sheet the statistical history was not yet sufficient to guarantee 1000000000 E/W
cycle performance for these types.
December 1994
3
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