DN74LS54S datasheet, PDF - EEWORLD Datasheet

DN74LS54S: DescriptionAND-OR-Invert Gate, TTL, PDSO14; Categorylogic logic; File Size47KB，2 Pages; ManufacturerPanasonic; Websitehttp://www.panasonic.co.jp/semicon/e-index.html

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DN74LS54S Overview

AND-OR-Invert Gate, TTL, PDSO14

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Panasonic
package instruction	SOP, SOP14,.25
Reach Compliance Code	unknown
JESD-30 code	R-PDSO-G14
JESD-609 code	e0
Logic integrated circuit type	AND-OR-INVERT GATE
MaximumI(ol)	0.008 A
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature	-20 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP14,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
power supply	5 V
Maximum supply current (ICC)	2 mA
Prop。Delay @ Nom-Sup	20 ns
Certification status	Not Qualified
Schmitt trigger	NO
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL

This Material Copyrighted By Its Respective Manufacturer

This Material Copyrighted By Its Respective Manufacturer

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