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S29WS064N0PBAW012

Description
IC,EEPROM,NOR FLASH,4MX16,CMOS,BGA,80PIN,PLASTIC
Categorystorage    storage   
File Size1MB,98 Pages
ManufacturerCypress Semiconductor
Environmental Compliance
Download Datasheet Parametric View All

S29WS064N0PBAW012 Overview

IC,EEPROM,NOR FLASH,4MX16,CMOS,BGA,80PIN,PLASTIC

S29WS064N0PBAW012 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerCypress Semiconductor
Reach Compliance Codecompliant
Maximum access time11.2 ns
startup blockBOTTOM/TOP
command user interfaceYES
Universal Flash InterfaceYES
Data pollingYES
JESD-30 codeR-PBGA-B80
memory density67108864 bit
Memory IC TypeFLASH
Number of departments/size8,126
Number of terminals80
word count4194304 words
character code4000000
Maximum operating temperature85 °C
Minimum operating temperature-25 °C
organize4MX16
Package body materialPLASTIC/EPOXY
encapsulated codeFBGA
Encapsulate equivalent codeBGA80,8X10,32
Package shapeRECTANGULAR
Package formGRID ARRAY, FINE PITCH
Parallel/SerialPARALLEL
power supply1.8 V
Certification statusNot Qualified
Department size16K,64K
Maximum standby current0.000005 A
Maximum slew rate0.06 mA
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
switch bitYES
typeNOR TYPE
S29WS-N MirrorBit™ Flash Family
S29WS256N, S29WS128N, S29WS064N
256/128/64 Megabit (16/8/4 M x 16-Bit) CMOS 1.8 Volt-only
Simultaneous Read/Write, Burst Mode Flash Memory
Data Sheet
PRELIMINARY
General Description
The Spansion S29WS256/128/064N are Mirrorbit
TM
Flash products fabricated on 110 nm process technology. These burst
mode Flash devices are capable of performing simultaneous read and write operations with zero latency on two separate
banks using separate data and address pins. These products can operate up to 80 MHz and use a single V
CC
of
1.7 V to 1.95 V that makes them ideal for today’s demanding wireless applications requiring higher density, better per-
formance and lowered power consumption.
Distinctive Characteristics
Single 1.8 V read/program/erase (1.70–1.95 V)
110 nm MirrorBit™ Technology
Simultaneous Read/Write operation with zero
latency
32-word Write Buffer
Sixteen-bank architecture consisting of 16/8/4
Mbit for WS256N/128N/064N, respectively
Four 16 Kword sectors at both top and bottom of
memory array
254/126/62 64 Kword sectors (WS256N/128N/
064N)
Programmable burst read modes
— Linear for 32, 16 or 8 words linear read with or
without wrap-around
— Continuous sequential read mode
SecSi™ (Secured Silicon) Sector region consisting
of 128 words each for factory and customer
20-year data retention (typical)
Cycling Endurance: 100,000 cycles per sector
(typical)
RDY output indicates data available to system
Command set compatible with JEDEC standards
Hardware (WP#) protection of top and bottom
sectors
Dual boot sector configuration (top and bottom)
Offered Packages
— WS064N: 80-ball FBGA (7 mm x 9 mm)
— WS256N/128N: 84-ball FBGA (8 mm x 11.6 mm)
Low V
CC
write inhibit
Persistent and Password methods of Advanced
Sector Protection
Write operation status bits indicate program and
erase operation completion
Suspend and Resume commands for Program and
Erase operations
Unlock Bypass program command to reduce
programming time
Synchronous or Asynchronous program operation,
independent of burst control register settings
ACC input pin to reduce factory programming time
Support for Common Flash Interface (CFI)
Industrial Temperature range (contact factory)
Performance Characteristics
Read Access Times
Speed Option (MHz)
Max. Synch. Latency, ns (t
IACC
)
Max. Synch. Burst Access, ns (t
BACC
)
Max. Asynch. Access Time, ns (t
ACC
)
Max CE# Access Time, ns (t
CE
)
Max OE# Access Time, ns (t
OE
)
80
80
9
80
80
13.5
66
80
11.2
80
80
13.5
54
80
13.5
80
80
13.5
Current Consumption (typical values)
Continuous Burst Read @ 66 MHz
Simultaneous Operation (asynchronous)
Program (asynchronous)
Erase (asynchronous)
Standby Mode (asynchronous)
35 mA
50 mA
19 mA
19 mA
20 µA
Typical Program & Erase Times
Single Word Programming
Effective Write Buffer Programming (V
CC
) Per Word
Effective Write Buffer Programming (V
ACC
) Per Word
Sector Erase (16 Kword Sector)
Sector Erase (64 Kword Sector)
40 µs
9.4 µs
6 µs
150 ms
600 ms
Publication Number
S29WS-N_00
Revision
G
Amendment
0
Issue Date
January 25, 2005
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