Data Hold Time, A after CAB or B after CBA (Note 3)
Free Air Operating Temperature
10
↑
0
↑
70
ALS646
ALS646-1
0.8
−15
24
48
40
MHz
ns
ns
ns
˚C
DM74ALS646/
74ALS646-1
Nom
5
Max
5.5
V
V
V
mA
mA
Units
Note 1:
This product meets application requirements of 500 temperature cycles from −65˚C to +150˚C.
Note 2:
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these
limits. The parametric values defined in the “Electrical Characteristics” table are not guaranteed at the absolute maximum ratings. The “Recommended Operating
Conditions” table will define the conditions for actual device operation.
Note 3:
↑
= With reference to the low to high transition of the respective clock.
Electrical Characteristics
over recommended free air temperature range
Symbol
V
IC
V
OH
Parameter
Input Clamp Voltage
High Level Output
Voltage
V
OL
Low Level Output
Voltage
I
I
I
IH
I
IL
I
O
I
CC
Input Current at Maximum
Input Voltage
High Level Input Current
Low Level Input
Current
Output Drive Current
Supply Current
V
CC
= Max
Test Conditions
V
CC
= Min, I
I
= −18 mA
V
CC
= 4.5V to 5.5V
I
OH
= −0.4 mA
= Min
V
CC
I
OH
= −3 mA
I
OH
= Max
V
CC
= Min
I
OL
= 12 mA
I
OL
= 24 mA
I
OL
= 48 mA
I/O Ports, V
I
= 5.5V
Control Inputs, V
I
= 7V
Min
V
CC
− 2
2.4
2
0.25
0.35
0.35
0.4
0.5
0.5
100
100
20
−200
−200
−30
47
55
55
−112
76
88
88
mA
mA
µA
µA
µA
V
3.2
V
Typ
Max
−1.2
Units
V
V
CC
= Max, V
I
= 2.7V (Note 4)
V
CC
= Max,
Control Inputs
V
I
= 0.4V, (Note 4)
I/O Ports
= Max, V
O
= 2.25V
V
CC
V
CC
= Max
Outputs High
Outputs Low
Outputs Disabled
Note 4:
For I/O ports the 3-STATE output currents (I
OZH
and I
OZL
) are included in the I
IH
and I
IL
parameters.
www.fairchildsemi.com
2
Switching Characteristics
over recommended operating free air temperature range (Note 5)
Symbol
Parameter
Conditions
From (Input)
To (Output)
DM74ALS646/
74ALS646-1
Min
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
(with A or B Low) (Note 6)
t
PHL
Propagation Delay Time
High to Low Level Output
(with A or B Low) (Note 6)
t
PLH
Propagation Delay Time
Low to High Level Output
(with A or B High) (Note 6)
t
PHL
Propagation Delay Time
High to Low Level Output
(with A or B High) (Note 6)
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Output Enable Time
to High Level Output
Output Enable Time
to Low Level Output
Output Disable Time
from High Level Output
Output Disable Time
from Low Level Output
Output Enable Time
to High Level Output
Output Enable Time
to Low Level Output
Output Disable Time
from High Level Output
Output Disable Time
from Low Level Output
Note 5:
See Section 1 for test waveforms and output load.
Note 6:
These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
Units
Max
30
17
20
12
ns
ns
ns
ns
V
CC
= 4.5V to 5.5V,
C
L
= 50 pF,
R
1
= R
2
= 500Ω,
T
A
= Min to Max
CBA or CAB
to A or B
CBA or CAB
to A or B
A or B to
B or A
A or B to
B or A
SBA or SAB
to A or B
SBA or SAB
to A or B
SBA or SAB
to A or B
SBA or SAB
to A or B
G to
A or B
G to
A or B
G to
A or B
G to
A or B
DIR to
A or B
DIR to
A or B
DIR to
A or B
DIR to
A or B
10
5
5
3
12
35
ns
5
20
ns
6
25
ns
5
3
5
1
2
6
5
1
2
20
17
20
10
16
30
25
10
16
ns
ns
ns
ns
ns
ns
ns
ns
ns
Function Table
Inputs
G
X
X
H
H
DIR
X
X
X
X
CAB
↑
Data I/O
(Note 7)
SAB
X
X
X
X
SBA
X
X
X
X
A1 thru A8
Input
Not Specified
Input
Input
B1 thru B8
Not Specified
Input
Input
Input
Operation or Function
Store A, B Unspecified
Store B, A Unspecified
Store A and B Data
Isolation, Hold Storage
CBA
X
↑
↑
X
↑
H/L
H/L
3
www.fairchildsemi.com
Function Table
G
L
L
L
L
DIR
L
L
H
H
CAB
X
X
X
H/L
(Continued)
Data I/O
(Note 7)
SAB
X
X
L
H
SBA
L
H
X
X
A1 thru A8
Output
Output
Input
Input
B1 thru B8
Input
Input
Output
Output
Real-Time B Data to a Bus
Stored B Data to a Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
Operation or Function
Inputs
CBA
X
H/L
X
X
Note 7:
The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled, i.e., data at the
bus pins will be stored on every low-to-high transition on the clock inputs.
H = High Logic Level, L = Low Logic Level, X = Don’t Care (Either Low or High Logic Levels including transitions), H/L = Either Low or High Logic Level excluding
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