P R E L I M I N A R Y
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7
Special Handling Instructions for FBGA Package .. 9
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Ordering Information . . . . . . . . . . . . . . . . . . . . . . 10
Standard Products ................................................ 10
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 11
Table 1. Am29LV800B Device Bus Operations ..........11
( D R A F T )
DQ3: Sector Erase Timer ..................................... 24
Table 2. Write Operation Status ..................................25
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 26
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 26
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 27
CMOS Compatible ............................................... 27
Figure 9. I
CC1
Current vs. Time (Showing Active and
Automatic Sleep Currents) .......................................... 28
Figure 10. Typical I
CC1
vs. Frequency ........................ 28
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 11. Test Setup.................................................. 29
Table 3. Test Specifications ........................................29
Word/Byte Configuration ...................................... 11
Requirements for Reading Array Data ................. 11
Writing Commands/Command Sequences .......... 11
Program and Erase Operation Status .................. 12
Standby Mode ...................................................... 12
Automatic Sleep Mode ......................................... 12
RESET#: Hardware Reset Pin ............................. 12
Output Disable Mode ............................................ 12
Table 2. Am29LV800BT Top Boot Block
Sector Addresses ........................................................13
Table 3. Am29LV800BB Bottom Boot Block
Sector Addresses ........................................................13
Key to Switching Waveforms. . . . . . . . . . . . . . . . 29
Figure 12. Input Waveforms and
Measurement Levels ................................................... 29
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 30
Read Operations .................................................. 30
Figure 13. Read Operations Timings .......................... 30
Hardware Reset (RESET#) .................................. 31
Figure 14. RESET# Timings........................................ 31
Word/Byte Configuration (BYTE#)
..................... 32
Autoselect Mode ................................................... 14
Table 4. Am29LV800B Autoselect Codes
(High Voltage Method) ................................................14
Figure 15. BYTE# Timings for Read Operations......... 32
Figure 16. BYTE# Timings for Write Operations ......... 32
Erase/Program Operations ................................... 33
Figure 17. Program Operation Timings ....................... 34
Figure 18. Chip/Sector Erase Operation Timings........ 35
Figure 19. Data# Polling Timings (During
Embedded Algorithms)................................................ 36
Figure 20. Toggle Bit Timings (During
Embedded Algorithms)................................................ 36
Figure 21. DQ2 vs. DQ6.............................................. 37
Sector Protection/Unprotection ............................ 14
Temporary Sector Unprotect ................................ 14
Figure 1. Temporary Sector Unprotect Operation....... 15
Figure 2. In-System Sector Protect/
Sector Unprotect Algorithms ....................................... 16
Hardware Data Protection .................................... 17
Command Definitions . . . . . . . . . . . . . . . . . . . . . 17
Reading Array Data .............................................. 17
Reset Command .................................................. 17
Autoselect Command Sequence .......................... 17
Word/Byte Program Command Sequence ........... 18
Figure 3. Program Operation ...................................... 18
Temporary Sector Unprotect ................................ 37
Figure 22. Temporary Sector Unprotect
Timing Diagram ........................................................... 37
Figure 23. Sector Protect/Unprotect
Timing Diagram ........................................................... 38
Alternate CE# Controlled Erase/Program Operations
39
Figure 24. Alternate CE# Controlled Write
Operation Timings ....................................................... 40
Chip Erase Command Sequence ......................... 19
Sector Erase Command Sequence ...................... 19
Erase Suspend/Erase Resume Commands ......... 19
Figure 4. Erase Operation........................................... 20
Table 1. Am29LV800B Command Definitions .............21
Write Operation Status . . . . . . . . . . . . . . . . . . . . 22
DQ7: Data# Polling ............................................... 22
Figure 5. Data# Polling Algorithm ............................... 22
RY/BY#: Ready/Busy# ......................................... 22
DQ6: Toggle Bit I .................................................. 23
DQ2: Toggle Bit II ................................................. 23
Reading Toggle Bits DQ6/DQ2 ............................ 23
DQ5: Exceeded Timing Limits .............................. 23
Figure 6. Toggle Bit Algorithm..................................... 24
Erase and Programming Performance . . . . . . . 41
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 41
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 41
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Physical Dimensions* . . . . . . . . . . . . . . . . . . . . . 42
TS 048—48-Pin Standard TSOP ........................ 42
TSR048—48-Pin Reverse TSOP ........................ 43
FBB 048—48-Ball Fine-Pitch Ball Grid Array
(FBGA) 6 x 9 mm ................................................ 44
SO 044—44-Pin Small Outline Package ............. 45
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 46
1
6/1/05
Am29LV800B
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
For new designs, S29AL008D supersedes Am29LV800B and is the factory-recommended migration path for this device. Please refer to the S29AL008D Family Datasheet for specifications
and ordering information.
DISTINCTIVE CHARACTERISTICS
• Single power supply operation
— 2.7 to 3.6 volt read and write operations for
battery-powered applications
• Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
• Manufactured on 0.32 µm process
technology
— Compatible with 0.5 µm Am29LV800 device
• High performance
— Access times as fast as 70 ns
• Minimum 1 million write cycle guarantee
per sector
• 20-year data retention at 125°C
— Reliable operation for the life of the system
• Ultra low power consumption (typical
values at 5 MHz)
—
—
—
—
200 nA Automatic Sleep mode current
200 nA standby mode current
7 mA read current
15 mA program/e+5rase current
• Package option
—
—
—
—
48-ball FBGA
48-pin TSOP
44-pin SO
Known Good Die (KGD)
(see publication number 21536)
• Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
fifteen 64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and
fifteen 32 Kword sectors (word mode)
— Supports full chip erase
— Sector Protection features:
• Compatibility with JEDEC standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
• Data# Polling and toggle bits
— Provides a software method of detecting
program or erase operation completion
A hardware method of locking a sector to prevent
any program or erase operations within that sector
Sectors can be locked in-system or via
programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
• Unlock Bypass Program Command
— Reduces overall programming time when
issuing multiple program command sequences
• Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
program or erase cycle completion
• Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
• Top or bottom boot block configurations
available
• Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
array data
This Data Sheet states AMD’s current technical specifications regarding the Product described herein. This
Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
Publication#
21490
Rev:
G
Amendment/+5
Issue Date:
May 25, 2005
ARM Technology
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