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Datasheet> All Categories > Wireless rf/communication> Radio frequency and microwave> PE4240-02
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PE4240-02

Description
SPST, 0MHz Min, 1300MHz Max, 1dB Insertion Loss-Max, 3 X 3 MM, PLASTIC, DFN-6
CategoryWireless rf/communication    Radio frequency and microwave   
File Size261KB，8 Pages
ManufacturerpSemi (peregrine semiconductor)
Websitehttp://www.psemi.com/
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PE4240-02 Overview

SPST, 0MHz Min, 1300MHz Max, 1dB Insertion Loss-Max, 3 X 3 MM, PLASTIC, DFN-6

PE4240-02 Parametric

Parameter NameAttribute value
MakerpSemi (peregrine semiconductor)
Reach Compliance Codeunknown
Other featuresCMOS COMPATIBLE, HIGH ISOLATION
Characteristic impedance50 Ω
structureCOMPONENT
Maximum input power (CW)32.99 dBm
Maximum insertion loss1 dB
Maximum operating frequency1300 MHz
Minimum operating frequency
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
RF/Microwave Device TypesSPST

PE4240-02 Preview

Product Specification
PE4240
Product Description
The PE4240 is a high-isolation MOSFET Switch designed for
CATV applications, covering a broad frequency range from
DC up to 1.3 GHz. This single-supply SPST switch offers a
single-pin CMOS control interface with industry leading CTB
performance. It also provides low insertion loss, high isolation
and extremely low bias requirements while operating on a
single 3-volt supply. In a typical CATV application, the
PE4240 provides for a cost effective and manufacturable
solution vs. mechanical relays.
The PE4240 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Figure 1. Functional Diagram
SPST UltraCMOS™ CATV Switch
DC - 1300 MHz
Features
•
75-ohm switch
•
Non-reflective at RF1, open reflective
at RF2 when OFF
•
Integrated 0.25 watt terminations
•
CTB performance of 100dBc
•
High isolation: 85 dB at 5 MHz, 47 dB
at 1 GHz
•
Low insertion loss: 0.5 dB at 5 MHz,
0.75 dB at 1 GHz
•
High input IP2: >80 dBm
•
CMOS/TTL single-pin control
•
Single +3 volt supply operation
Figure 2. Package Type
6-lead DFN
RF1
RF2
75
CMOS
Control
Driver
Table 1. Electrical Specifications @ +25 °C
(Z
S
= Z
L
= 75
Ω)
Parameter
Operating Frequency
1
Operating Power
Insertion Loss
Isolation
Return Loss
Input 1 dB Compression
2,4
Input IP2
2
CTB / CSO
Input IP3
2
Video Feedthrough
3
Switching Time
Notes: 1. Device linearity will begin to degrade below 1 MHz.
2. Measured in a 50
Ω
system.
3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth.
4. Note Absolute Maximum ratings in Table 3.
Document No. 70-0067-03
│
www.psemi.com
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 8
2
On / Off
DC – 50 MHz
1000 MHz
DC – 50 MHz
1000 MHz
DC - 1000 MHz
1000 MHz
1000 MHz
77 & 110 channels;
PO = 44 dBmV
1000 MHz
50
15
71
44
14
30
80
-100
0.5
0.75
85
47
20
33
CTRL
Condition
Minimum
DC
Typical
Maximum
1300
30/24
0.65
1.0
Units
MHz
dBm
dB
dB
dB
dBm
dBm
dBc
dBm
mV
pp
µs
PE4240
Product Specification
Figure 3. Pin Configuration
RF2
GND
RF1
1
2
3
Exposed Solder
Pad - Shorted
to Pin 2
(bottom side)
Table 4. DC Electrical Specifications @ 25 °C
Parameter
Min
2.7
Typ
3.0
33
Max
3.3
40
5
30% V
DD
Unit
V
µA
V
V
6
5
4
RFC
CTRL
V
DD
Power Supply
I
DD
Power Supply Current
(V
DD
= 3V, V
CNTL
= 3V)
Control Voltage High
70% V
DD
0
V
DD
Control Voltage Low
Table 2. Pin Descriptions
Pin
No.
1
2
3
4
5
6
Pin
Name
V
DD
GND
RF1
CTRL
GND
RF2
Description
Nominal 3 V supply connection.
1
Ground connection.
3
RF port.
2
CMOS or TTL logic level:
High = RF1 to RF2 signal path
Low = RF1 isolated from RF2
Ground connection.
3
RF port.
2
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Device Description
The PE4240 high isolation SPST CATV Switch is
designed to support CATV applications such as
premium channel service connect/disconnect switch
blocks. This function is typically performed by bulky
and expensive mechanical switches. The high
isolation characteristics (>44 dB at 1 GHz, 85 dB
at 5 MHz), high compression point, and an
integrated 75-ohm terminations make the PE4240
an ideal, low cost solution.
Figure 4. Typical Application Block Diagram
Unit
V
V
°C
°C
dBm
V
2-way
Splitter
PE4240
Premium
Channel
Filter
PE4240
Notes: 1. A bypass capacitor should be placed as close as possible
to the pin.
2. Both RF pins must be held at 0 V
AC
or require external DC
blocking capacitors.
3. The exposed pad must be soldered to the ground plane for
proper switch performance.
Table 3. Absolute Maximum Ratings
Symbol
V
DD
V
I
T
ST
T
OP
P
IN
V
ESD
Parameter/Condition
Power supply voltage
Voltage on CTRL input
Storage temperature
Operating temperature
Input power (50Ω),
CTRL=1/CTRL=0
ESD voltage
(Human Body Model)
Min
-0.3
-0.3
-65
-40
Max
4.0
5.5
150
85
33/24
200
CATVin
CATVout
Table 5. Control Logic Truth Table
Control Voltage (CTRL)
High
1
Low
Signal Path (RF1 to RF2)
ON
OFF
Absolute Maximum Ratings are those values listed
in the above table. Exceeding these values may
cause permanent device damage. Functional
operation should be restricted to the limits in the DC
Electrical Specifications table. Exposure to absolute
maximum ratings for extended periods may affect
device reliability.
Notes: 1. CTRL accepts both CMOS and TTL voltage leads.
The control logic input pin (CTRL) is typically driven
by a 3-volt CMOS logic level signal, and has a
threshold of 50% of V
DD
. For flexibility to support
systems that have 5-volt control logic drivers, the
control logic input has been designed to handle a 5-
volt logic HIGH signal. (A minimal current will be
sourced out of the V
DD
pin when the control logic in-
put voltage level exceeds V
DD.
)
Document No. 70-0067-03
│
UltraCMOS™ RFIC Solutions
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 8
PE4240
Product Specification
Typical Performance Data @ 25 °C (Unless Otherwise Noted)
(75
Ω
impedance except as indicated)
Figure 5. Insertion Loss
Figure 6. Input 1dB Compression Point and IIP3
50
Ω
system impedance
0
60
60
-0.2
-40 C
-0.4
Insertion Loss (dB)
50
IIP3
IIP3 (dBm)
50
1dB Compression Point (dBm)
-0.6
40
40
-0.8
85 C
25 C
30
-1
30
Input 1dB Compression
-1.2
0
200
400
600
800
1000
1200
20
0
200
400
600
800
1000
1200
20
Frequency (MHz)
Frequency (MHz)
Figure 7. Isolation
0
-20
Isolation (dB)
-40
-60
-80
-100
0
200
400
600
800
1000
1200
Frequency (MHz)
Document No. 70-0067-03
│
www.psemi.com
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 8
PE4240
Product Specification
Typical Performance Data @ 25 °C
(75
Ω
impedance except as indicated)
Figure 8. RF1 Return Loss (Switch = ON)
Figure 9. RF1 Return Loss (Switch = OFF)
0
0
-5
-6
-10
Return Loss (dB)
Return Loss (dB)
-12
-15
-18
-20
-25
-24
-30
0
200
400
600
800
1000
1200
-30
0
200
400
600
800
1000
1200
Frequency (MHz)
Frequency (MHz)
Figure 10. RF2 Return Loss (Switch = ON)
0
-5
-10
Return Loss (dB)
-15
-20
-25
-30
0
200
400
600
800
1000
1200
Frequency (MHz)
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 8
Document No. 70-0067-03
│
UltraCMOS™ RFIC Solutions
PE4240
Product Specification
Evaluation Kit
The SPST Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4240 SPST switch. The RF1 port is connected
through a 75
Ω
transmission line to the top left
BNC connector, J1. The RF2 port is connected
through a 75
Ω
transmission line to the BNC
connector on the top right side of the board, J2. A
through transmission line connects BNC
connectors J3 and J4. This transmission line can
be used to estimate the loss of the PCB over the
environmental conditions being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide model with
trace width of 0.021”, trace gaps of 0.030”,
dielectric thickness of 0.028”, metal thickness of
0.0021” and
εR
of 4.3. Note that the predominate
mode for these transmission lines is coplanar
waveguide with a ground plane.
Figure 11. Evaluation Board Layouts
Peregrine Specification 101/0079
J5 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left
pin, the second pin to the right (J5-3) is connected
to the device V
DD
input. The fourth pin to the right
(J5-7) is connected to the device CTRL input. It is
the responsibility of the customer to determine
proper supply decoupling for their design
application. Removing these components from
the evaluation board has not been shown to
degrade RF performance.
Figure 12. Evaluation Board Schematic
Peregrine Specification 102/0081
Document No. 70-0067-03
│
www.psemi.com
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 8
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