IDT71V25761YS183BGG datasheet, PDF

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IDT71V25761YS183BGG: DescriptionCache SRAM, 128KX36, 3.3ns, CMOS, PBGA165, FBGA-165; Categorystorage storage; File Size614KB，22 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT71V25761YS183BGG Overview

Cache SRAM, 128KX36, 3.3ns, CMOS, PBGA165, FBGA-165

IDT71V25761YS183BGG Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology)
Parts packaging code	BGA
package instruction	TBGA,
Contacts	165
Reach Compliance Code	unknown
ECCN code	3A991.B.2.A
Maximum access time	3.3 ns
Other features	PIPELINED ARCHITECTURE
JESD-30 code	R-PBGA-B165
JESD-609 code	e0
length	15 mm
memory density	4718592 bit
Memory IC Type	CACHE SRAM
memory width	36
Number of functions	1
Number of terminals	165
word count	131072 words
character code	128000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	128KX36
Package body material	PLASTIC/EPOXY
encapsulated code	TBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	13 mm

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128K X 36, 256K X 18

IDT71V25761YS

3.3V Synchronous SRAMs

IDT71V25781YS

2.5V I/O, Pipelined Outputs,

IDT71V25761YSA

Burst Counter, Single Cycle Deselect

IDT71V25781YSA

◆

Features

128K x 36, 256K x 18 memory configurations

Supports high system speed:

Commercial:

– 200MHz 3.1ns clock access time

Commercial and Industrial:

– 183MHz 3.3ns clock access time

– 166MHz 3.5ns clock access time

LBO

input selects interleaved or linear burst mode

Self-timed write cycle with global write control (GW), byte write

enable (BWE), and byte writes (BWx)

3.3V core power supply

Power down controlled by ZZ input

2.5V I/O

Optional - Boundary Scan JTAG Interface (IEEE 1149.1

Compliant)

Packaged in a JEDEC Standard 100-pin plastic thin quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball

grid array

Description

The IDT71V25761/781 are high-speed SRAMs organized as 128K

x 36/256K x 18. The IDT71V25761/781 SRAMs contain write, data,

address and control registers. Internal logic allows the SRAM to generate

a self-timed write based upon a decision which can be left until the end of

the write cycle.

The burst mode feature offers the highest level of performance to the

system designer, as the IDT71V25761/718 can provide four cycles of data

for a single address presented to the SRAM. An internal burst address

counter accepts the first cycle address from the processor, initiating the

access sequence. The first cycle of output data will be pipelined for one

cycle before it is available on the next rising clock edge. If burst mode

operation is selected (ADV=LOW), the subsequent three cycles of output

data will be available to the user on the next three rising clock edges. The

order of these three addresses are defined by the internal burst counter

and the

LBO

input pin.

The IDT71V25761/781 SRAMs utilize IDT’s latest high-performance

CMOS process and are packaged in a JEDEC standard 14mm x 20mm

100-pin thin plastic quad flatpack (TQFP) as well as a 119 ball grid array

(BGA) and 165 fine pitch ball grid array (fBGA).

Input

Output

Input

I/O

Supply

Synchronous

Asynchronous

Synchronous

N/A

Synchronous

N/A

Synchronous

Asynchronous

Synchronous

N/A

6444 tbl 01

◆

Pin Description Summary

-A

BWE

(1)

CLK

ADV

ADSC

ADSP

LBO

TMS

TDI

TCK

TDO

TRST

I/O

-I/O

, I/O

-I/O

, V

DDQ

Address Inputs

Chip Enable

Chip Selects

Output Enable

Global Write Enable

Byte Write Enable

Individual Byte Write Selects

Clock

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Test Mode Select

Test Data Input

Test Clock

Test Data Output

JTAG Reset (Optional)

Sleep Mode

Data Input / Output

Core Power, I/O Power

Ground

NOTE:

and

are not applicable for the IDT71V25781.

MAY 2004

DSC-6444/01

IDT71V25761YS183BGG Related Products

	IDT71V25761YS183BGG	71V25761YSA183BG8	71V25761YSA200BG8	DBP-M954LF-00-8870-D	IDT71V25761YSA200BQG	71V25761YSA166BGI8	71V25761YSA166BG8
Description	Cache SRAM, 128KX36, 3.3ns, CMOS, PBGA165, FBGA-165	Cache SRAM, 128KX36, 3.3ns, CMOS, PBGA119, BGA-119	Cache SRAM, 128KX36, 3.1ns, CMOS, PBGA119, BGA-119	Array/Network Resistor, Bussed, Tantalum Nitride/nickel Chrome, 0.1W, 887ohm, 100V, 0.5% +/-Tol, -300,300ppm/Cel, 4726,	Cache SRAM, 128KX36, 3.1ns, CMOS, PBGA165, FBGA-165	Cache SRAM, 128KX36, 3.5ns, CMOS, PBGA119, BGA-119	Cache SRAM, 128KX36, 3.5ns, CMOS, PBGA119, BGA-119
Reach Compliance Code	unknown	not_compliant	not_compliant	compliant	unknown	not_compliant	not_compliant
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	EAR99	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	-	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	BGA	BGA	BGA	-	BGA	BGA	BGA
package instruction	TBGA,	BGA-119	BGA-119	-	TBGA,	BGA-119	BGA-119
Contacts	165	119	119	-	165	119	119
Maximum access time	3.3 ns	3.3 ns	3.1 ns	-	-	3.5 ns	3.5 ns
Other features	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	-	-	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE
JESD-30 code	R-PBGA-B165	R-PBGA-B119	R-PBGA-B119	-	-	R-PBGA-B119	R-PBGA-B119
JESD-609 code	e0	e0	e0	e3	-	e0	e0
length	15 mm	22 mm	22 mm	-	-	22 mm	22 mm
memory density	4718592 bit	4718592 bit	4718592 bit	-	-	4718592 bit	4718592 bit
Memory IC Type	CACHE SRAM	CACHE SRAM	CACHE SRAM	-	-	CACHE SRAM	CACHE SRAM
memory width	36	36	36	-	-	36	36
Number of functions	1	1	1	-	-	1	1
Number of terminals	165	119	119	8	-	119	119
word count	131072 words	131072 words	131072 words	-	-	131072 words	131072 words
character code	128000	128000	128000	-	-	128000	128000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	-	-	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	150 °C	-	85 °C	70 °C
organize	128KX36	128KX36	128KX36	-	-	128KX36	128KX36
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-	-	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TBGA	BGA	BGA	-	-	BGA	BGA
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR PACKAGE	-	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE	GRID ARRAY	GRID ARRAY	DIP	-	GRID ARRAY	GRID ARRAY
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	-	-	PARALLEL	PARALLEL
Certification status	Not Qualified	Not Qualified	Not Qualified	-	-	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	2.36 mm	2.36 mm	-	-	2.36 mm	2.36 mm
Maximum supply voltage (Vsup)	3.465 V	3.465 V	3.465 V	-	-	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V	3.135 V	-	-	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	-	-	3.3 V	3.3 V
surface mount	YES	YES	YES	-	-	YES	YES
technology	CMOS	CMOS	CMOS	TANTALUM NITRIDE/NICKEL CHROME	-	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	-	-	INDUSTRIAL	COMMERCIAL
Terminal surface	TIN LEAD	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Matte Tin (Sn)	-	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)
Terminal form	BALL	BALL	BALL	-	-	BALL	BALL
Terminal pitch	1 mm	1.27 mm	1.27 mm	-	-	1.27 mm	1.27 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	-	-	BOTTOM	BOTTOM
width	13 mm	14 mm	14 mm	-	-	14 mm	14 mm
Is it Rohs certified?	-	incompatible	incompatible	conform to	-	incompatible	incompatible
Maximum clock frequency (fCLK)	-	183 MHz	200 MHz	-	-	166 MHz	166 MHz
I/O type	-	COMMON	COMMON	-	-	COMMON	COMMON
Humidity sensitivity level	-	3	3	-	-	3	3
Output characteristics	-	3-STATE	3-STATE	-	-	3-STATE	3-STATE
Encapsulate equivalent code	-	BGA119,7X17,50	BGA119,7X17,50	-	-	BGA119,7X17,50	BGA119,7X17,50
power supply	-	2.5,3.3 V	2.5,3.3 V	-	-	2.5,3.3 V	2.5,3.3 V
Maximum standby current	-	0.03 A	0.03 A	-	-	0.035 A	0.03 A
Minimum standby current	-	3.14 V	3.14 V	-	-	3.14 V	3.14 V
Maximum slew rate	-	0.34 mA	0.36 mA	-	-	0.33 mA	0.32 mA
Base Number Matches	-	1	1	-	1	1	-

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