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UPD29F032202ALGZ-B85BY-MJH

Description
Flash, 2MX16, 85ns, PDSO48, 12 X 20 MM, PLASTIC, TSOP1-48
Categorystorage    storage   
File Size204KB,32 Pages
ManufacturerNEC Electronics
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UPD29F032202ALGZ-B85BY-MJH Overview

Flash, 2MX16, 85ns, PDSO48, 12 X 20 MM, PLASTIC, TSOP1-48

UPD29F032202ALGZ-B85BY-MJH Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerNEC Electronics
Parts packaging codeTSOP1
package instruction12 X 20 MM, PLASTIC, TSOP1-48
Contacts48
Reach Compliance Codecompliant
ECCN code3A991.B.1.A
Maximum access time85 ns
Spare memory width8
startup blockBOTTOM
JESD-30 codeR-PDSO-G48
JESD-609 codee0
length18.4 mm
memory density33554432 bit
Memory IC TypeFLASH
memory width16
Number of functions1
Number of terminals48
word count2097152 words
character code2000000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize2MX16
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Programming voltage2.7 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.3 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
typeNOR TYPE
width12 mm

UPD29F032202ALGZ-B85BY-MJH Preview

DATA SHEET
µ
PD29F032202AL-Y
32M-BIT CMOS LOW-VOLTAGE DUAL OPERATION FLASH MEMORY
4M-WORD BY 8-BIT (BYTE MODE) / 2M-WORD BY 16-BIT (WORD MODE)
MOS INTEGRATED CIRCUIT
Description
The
µ
PD29F032202AL-Y is a flash memory organized of 33,554,432 bits and 71 sectors. Sectors of this memory
can be erased at a low voltage (2.7 to 3.3 V, 3.0 to 3.6 V) supplied from a single power source, or the contents of the
entire chip can be erased. Two modes of memory organization, BYTE mode (4,194,304 words
×
8 bits) and WORD
mode (2,097,152 words
×
16 bits), are selectable so that the memory can be programmed in byte or word units.
The
µ
PD29F032202AL-Y can be read while its contents are being erased or programmed. The memory cell is
divided into two banks. While sectors in one bank are being erased or programmed, data can be read from the other
bank thanks to the simultaneous execution architecture. The banks are 4M bits and 28M bits.
This flash memory comes in two types. The T type has a boot sector located at the highest address (sector) and the
B type has a boot sector at the lowest address (sector).
Because the
µ
PD29F032202AL-Y enables the boot sector to be erased, it is ideal for storing a boot program. In
addition, program code that controls the flash memory can be also stored, and the program code can be
programmed or erased without the need to load it into RAM. Eight small sectors for storing parameters are provided,
each of which can be erased in 8K bytes units.
Once a program or erase command sequence has been executed, an automatic program or automatic erase
function internally executes program or erase and verification automatically.
Because the
µ
PD29F032202AL-Y can be electrically erased or programmed by writing an instruction, data can be
reprogrammed on-board after the flash memory has been installed in a system, making it suitable for a wide range of
applications.
This flash memory is packed in a 48-pin PLASTIC TSOP (I) and 63-pin TAPE FBGA.
Features
Two bank organization enabling simultaneous execution of program / erase and read
Bank organization: 2 banks (4M bits + 28M bits)
Memory organization : 4,194,304 words
×
8 bits (BYTE mode)
2,097,152 words
×
16 bits (WORD mode)
Sector organization : 71 sectors (8K bytes / 4K words
×
8 sectors, 64K bytes / 32K words
×
63 sectors)
2 types of sector organization
T type : Boot sector allocated to the highest address (sector)
B type : Boot sector allocated to the lowest address (sector)
3-state output
Automatic program
Program suspend / resume
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M15515EJ5V0DS00 (5th edition)
Date Published September 2002 NS CP (K)
Printed in Japan
The mark
5
shows major revised points.
©
2001
µ
PD29F032202AL-Y
Unlock bypass program
Automatic erase
Chip erase
Sector erase (sectors can be combined freely)
Erase suspend / resume
Program / Erase completion detection
Detection through data polling and toggle bits
Detection through RY (/BY) pin
Sector group protection
Any sector group can be protected
Any protected sector group can be temporary unprotected
Sectors can be used for boot application
Hardware reset and standby using /RESET pin
Automatic sleep mode
Boot block sector protect by /WP (ACC) pin
Conforms to common flash memory interface (CFI)
Extra One Time Protect Sector provided
µ
PD29F032202AL
Access time
ns (MAX.)
Operating supply
voltage
V
Power supply current
(Active mode)
mA (MAX.)
Read
-A85TY, -A85BY
-B85TY, -B85BY
85
3.0 to 3.6
2.7 to 3.3
16
Program / Erase
30
5
Standby current
µ
A (MAX.)
Operating ambient temperature: –40 to +85°C
Program / erase time
Program: 9.0
µ
s / byte (TYP.)
11.0
µ
s / word (TYP.)
Sector erase :
Program / erase cycle : 100,000 cycles
0.3 s (TYP.) (4K words sector), 0.5 s (TYP.) (32K words sector)
Program / erase cycle : 300,000 cycles
0.5 s (TYP.) (4K words sector), 0.7 s (TYP.) (32K words sector)
Program / erase cycle : 300,000 cycles (MIN.)
2
Data Sheet M15515EJ5V0DS
µ
PD29F032202AL-Y
Ordering Information
Part number
Access time
ns (MAX.)
Operating
supply voltage
V
Boot sector
Package
µ
PD29F032202ALGZ-A85TY-MJH
µ
PD29F032202ALGZ-A85BY-MJH
µ
PD29F032202ALF9-A85TY-BS2
µ
PD29F032202ALF9-A85BY-BS2
µ
PD29F032202ALGZ-B85TY-MJH
µ
PD29F032202ALGZ-B85BY-MJH
µ
PD29F032202ALF9-B85TY-BS2
µ
PD29F032202ALF9-B85BY-BS2
85
3.0 to 3.6
Top address (sector)
(T type)
Bottom address (sector)
(B type)
Top address (sector)
(T type)
Bottom address (sector)
(B type)
48-pin PLASTIC TSOP (I) (12
×
20)
(Normal bent)
63-pin TAPE FBGA (11
×
7)
2.7 to 3.3
Top address (sector)
(T type)
Bottom address (sector)
(B type)
Top address (sector)
(T type)
Bottom address (sector)
(B type)
48-pin PLASTIC TSOP (I) (12
×
20)
(Normal bent)
63-pin TAPE FBGA (11
×
7)
Remark
For address organization of sectors, see section
Sector Organization / Sector Address Table.
Data Sheet M15515EJ5V0DS
3
µ
PD29F032202AL-Y
Pin Configurations
/xxx indicates active low signal.
48-pin PLASTIC TSOP (I) (12
×
20) (Normal bent)
[
µ
PD29F032202ALGZ-A85TY-MJH ]
[
µ
PD29F032202ALGZ-A85BY-MJH ]
[
µ
PD29F032202ALGZ-B85TY-MJH ]
[
µ
PD29F032202ALGZ-B85BY-MJH ]
Marking Side
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
/WE
/RESET
NC
/WP (ACC)
RY (/BY)
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
/BYTE
GND
I/O15, A−1
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
V
CC
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
/OE
GND
/CE
A0
A0 to A20
I/O15, A−1
/CE
/WE
/OE
/BYTE
/RESET
RY (/BY)
/WP (ACC)
V
CC
GND
NC
Note
: Address inputs
: Data 15 Input / output (WORD mode)
LSB address input (BYTE mode)
: Chip Enable
: Write Enable
: Output Enable
: Mode select
: Hardware reset input
: Ready (Busy) output
: Write Protect (Accelerated) input
: Supply Voltage
: Ground
: No Connection
I/O0 to I/O14 : Data Inputs / Outputs
Note
Some signals can be applied because this pin is not connected to the inside of the chip.
Remark
Refer to
Package Drawings
for the 1-pin index mark.
4
Data Sheet M15515EJ5V0DS
µ
PD29F032202AL-Y
63-pin TAPE FBGA (11
×
7)
[
µ
PD29F032202ALF9-A85TY-BS2]
[
µ
PD29F032202ALF9-A85BY-BS2]
[
µ
PD29F032202ALF9-B85TY-BS2]
[
µ
PD29F032202ALF9-B85BY-BS2]
Top View
Top View
Bottom View
Bottom View
8
7
6
5
4
3
2
1
A B C D E F G H J K L M
A B C D E F G H
A
B
C
A
D
B
E
C
NC
A14
A13
A10
A9
NC
A20
A18
RY(/BY)
A6
A18
A2
A5
A2
M L K J H G F E D C B A
Top View
F
G
Top View
D
NC
A15
A14
A11
A10
A19
A20
A5
A17
A1
A4
A1
E
A16
A16
SA
I/O7
I/O6
I/O5
I/O2
I/O0
I/O1
A0
V
SS
A0
H G F E D C B A
H
F
J
G
K
H
GND
I/O14
I/O6
I/O5
I/O4
CIOs
I/O3
I/O11
I/O1
I/O2
GND
I/O8
L
M
8
7
6
5
4
3
2
1
NC
NC
NC
8
NC
7
6
5
4
3
NC
NC
NC
NC
NC
NC
2
NC
1
A15
A12
A13
A12
A11
A8
A9
A19
A8
/RESET
/WE
CE2s
/WE
RY(/BY) /WP(ACC)
/WP(ACC) /RESET
A7
A17
/LB
/UB
A3
A4
A7
A6
A3
CIOf
V
SS
/BYTE I/O15,A−1
I/O15, A-1 I/O7
I/O14
I/O13
I/O13
I/O12
I/O12
V
CC
I/O4
V
CC
s
I/O10
I/O11
I/O3
V
CC
f
I/O8
I/O9
I/O9
I/O10
/CE
/OE
/OE
I/O0
/CEf
/CE1s
NC
NC
NC
NC
A0 to A20
I/O15, A−1
/CE
/WE
/OE
/BYTE
/RESET
RY (/BY)
/WP (ACC)
V
CC
GND
NC
Note
: Address inputs
: Data 15 Input / output (WORD mode)
LSB address input (BYTE mode)
: Chip Enable
: Write Enable
: Output Enable
: Mode select
: Hardware reset input
: Ready (Busy) output
: Write Protect (Accelerated) input
: Supply Voltage
: Ground
: No Connection
I/O0 to I/O14 : Data Inputs / Outputs
Note
Some signals can be applied because this pin is not connected to the inside of the chip.
Remark
Refer to
Package Drawings
for the index mark.
INPUT / OUTPUT PIN FUNCTION
Refer to
DUAL OPERATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
Data Sheet M15515EJ5V0DS
5
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