DSP56304GC80 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> DSP56304GC80

DSP56304GC80: DescriptionDigital Signal Processor, 24-Bit Size, 24-Ext Bit, 80MHz, CMOS, PBGA196, PLASTIC, BGA-196; CategoryThe embedded processor and controller Microcontrollers and processors; File Size970KB，165 Pages; ManufacturerMotorola ( NXP ); Websitehttps://www.nxp.com

Download Datasheet Parametric Compare View All

DSP56304GC80 Overview

Digital Signal Processor, 24-Bit Size, 24-Ext Bit, 80MHz, CMOS, PBGA196, PLASTIC, BGA-196

DSP56304GC80 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Motorola ( NXP )
package instruction	PLASTIC, BGA-196
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Address bus width	18
barrel shifter	YES
bit size	24
boundary scan	YES
maximum clock frequency	80 MHz
External data bus width	24
Format	FIXED POINT
Integrated cache	NO
Internal bus architecture	MULTIPLE
JESD-30 code	S-PBGA-B196
JESD-609 code	e0
length	15 mm
low power mode	YES
Number of DMA channels	6
Number of external interrupt devices	5
Number of serial I/Os	2
Number of terminals	196
Number of timers	3
On-chip data RAM width	24
On-chip program ROM width	24
Maximum operating temperature	100 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA196,14X14,40
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
RAM (number of words)	5020
ROM programmability	MROM
Maximum seat height	1.75 mm
Maximum slew rate	145 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER

DSP56304GC80 Preview

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Order this document by:

DSP56304/D

DSP56304

Advance Information

24-BIT DIGITAL SIGNAL PROCESSOR

Motorola designed the ROM-based DSP56304 to support multifunction wireless and

embedded DSP applications. In addition to the large on-chip ROM spaces, the DSP56304 also

has a ROM patch feature that facilitates updates to the on-chip mask Program ROM-based

on-chip software. The DSP56304 includes a triple timer module, Host Interface (HI08), an

Enhanced Synchronous Serial Interface (ESSI), and a Serial Communications Interface (SCI).

The DSP56300 core family includes a Phase Lock Loop (PLL), External Memory Interface

(EMI), Data Arithmetic Logic Unit (Data ALU), 24-bit addressing, instruction cache, and

DMA. The DSP56304 offers 66/80 MIPS using an internal 66/80 MHz clock at 3.0–3.6 volts.

Memory Expansion Area

Triple

Timer

Host

Interface

HI08

ESSI

Interface

SCI

Interface

Program RAM

1024

24*

Program ROM

33792

*default

PIO_EB

PM_EB

Y Data

X Data

RAM

1792

24*

3328

24*

ROM

9216

*default

XM_EB

YM_EB

Peripheral

Expansion Area

Address

Generation

Unit

Six Channel

DMA Unit

Boot-

strap

ROM

YAB

XAB

PAB

DAB

External

Address

Bus

Switch

External

Bus

Interface

I-Cache

Control

Address

24-Bit

DSP56300

Core

DDB

YDB

Control

Internal

Data

Bus

Switch

EXTAL

XTAL

Clock

Generator

PLL

RESET

PINIT/NMI

Program

Interrupt

Controller

Program

Decode

Controller

MODA/IRQA

MODB/IRQB

MODC/IRQC

MODD/IRQD

Program

Address

Generator

XDB

PDB

GDB

External

Data Bus

Switch

Data

Data ALU

24 + 56

→

56-bit MAC JTAG

Two 56-bit Accumulators

OnCE™

56-bit Barrel Shifter

Power

Mngmnt

AA0853

Figure 1

DSP56304 Block Diagram

This document contains information on a new product. Specifications and information herein are subject to change without notice.

Preliminary Data

TABLE OF CONTENTS

SECTION 1

SECTION 2

SECTION 3

SECTION 4

SECTION 5

APPENDIX A

SIGNAL/CONNECTION DESCRIPTIONS . . . . . . . . . . . . . . . . . . 1-1

SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

PACKAGING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

DESIGN CONSIDERATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

POWER CONSUMPTION BENCHMARK . . . . . . . . . . . . . . . . . . A-1

INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Index-1

FOR TECHNICAL ASSISTANCE:

Telephone:

Email:

Internet:

1-800-521-6274

dsphelp@dsp.sps.mot.com

http://www.motorola-dsp.com

Data Sheet Conventions

This data sheet uses the following conventions:

OVERBAR

“asserted”

“deasserted”

Examples:

Used to indicate a signal that is active when pulled low (For example, the RESET

pin is active when low.)

Means that a high true (active high) signal is high or that a low true (active low)

signal is low

Means that a high true (active high) signal is low or that a low true (active low)

signal is high

Signal/Symbol

Note:

Logic State

True

False

True

False

Signal State

Asserted

Deasserted

Asserted

Deasserted

Voltage

Values for V

, V

, and V

are defined by individual product specifications.

Preliminary Data

DSP56304/D

MOTOROLA

DSP56304

Features

FEATURES

DSP56304 FEATURES

High Performance DSP56300 Core

•

66/80 Million Instructions Per Second (MIPS) with a 66/80 MHz clock

Object code compatible with the DSP56000 core

Highly parallel instruction set

Fully pipelined 24

24-bit parallel Multiplier-Accumulator (MAC)

56-bit parallel barrel shifter

24-bit or 16-bit arithmetic support under software control

Position independent code support

Addressing modes optimized for DSP applications

On-chip instruction cache controller

On-chip memory-expandable hardware stack

Nested hardware DO loops

Fast auto-return interrupts

On-chip concurrent six-channel DMA controller

On-chip Phase Lock Loop (PLL) and clock generator

On-Chip Emulation (OnCE™) module

JTAG Test Access Port (TAP)

Address Tracing mode reflects internal accesses at the external port

Preliminary Data

MOTOROLA

DSP56304/D

iii

DSP56304

DSP56304 Features

On-chip Memories

•

Program RAM, Instruction Cache, X data RAM, and Y data RAM size is

programmable:

Switch

Mode

disabled

enabled

Program

RAM Size

1024

24-bit

3584

24-bit

2560

24-bit

Instruction

Cache Size

1024

24-bit

1024

24-bit

X Data RAM

Size

3328

24-bit

3328

24-bit

2048

24-bit

2048

24-bit

Y Data RAM

Size

1792

24-bit

1792

24-bit

512

24-bit

512

24-bit

Instruction

Cache

disabled

enabled

disabled

enabled

•

33, 792

24-bit Program ROM with Patch mode update capability using

instruction cache memory space

9,216

24-bit X data ROM and 9,216

24-bit Y data ROM

192

24-bit bootstrap ROM

Off-chip Memory Expansion

•

Data memory expansion to two 256 K

24-bit word memory spaces (the

usage of address attribute pins and/or DRAM interface may further

extend the data memory expansion up to two 16 M

24-bit words

memory space)

Program memory expansion to one 256 K

24-bit word memory space

(the usage of address attribute pins and/or DRAM interface may further

extend the program memory expansion up to two 16 M

24-bit words

memory space)

External memory expansion port

Chip select logic requires no additional circuitry to interface to SRAMs

and SSRAMs

On-chip DRAM controller requires no additional circuitry to interface to

DRAMs

•

Preliminary Data

DSP56304/D

MOTOROLA

DSP56304

Target Applications

On-chip Peripherals

•

8-bit parallel Host Interface (HI08), ISA-compatible bus interface,

providing a cost-effective solution for applications not requiring the PCI

bus

Two Enhanced Synchronous Serial Interfaces (ESSI0 and ESSI1)

Serial Communications Interface (SCI) with baud rate generator

Triple timer module

Up to thirty-four programmable General Purpose I/O pins (GPIO),

depending on which peripherals are enabled

•

Reduced Power Dissipation

•

Very low power CMOS design

Wait and Stop low power standby modes

Fully-static logic, operation frequency down to DC

Optimized power management circuitry

TARGET APPLICATIONS

The DSP56304 is intended for use in embedded multifunction DSP applications

requiring large on-board ROM spaces, such as wireless products that combine

standard cellular phone operation with options such as two-way digital paging

and fax capability in one unit.

Preliminary Data

MOTOROLA

DSP56304/D

More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

DSP56304GC80 Related Products

	DSP56304GC80	DSP56304PV80	DSP56304PV66
Description	Digital Signal Processor, 24-Bit Size, 24-Ext Bit, 80MHz, CMOS, PBGA196, PLASTIC, BGA-196	Digital Signal Processor, 24-Bit Size, 24-Ext Bit, 80MHz, CMOS, PQFP144, TQFP-144	Digital Signal Processor, 24-Bit Size, 24-Ext Bit, 66MHz, CMOS, PQFP144, TQFP-144
Is it Rohs certified?	incompatible	incompatible	incompatible
Maker	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )
package instruction	PLASTIC, BGA-196	TQFP-144	TQFP-144
Reach Compliance Code	unknown	unknown	unknown
ECCN code	3A001.A.3	3A001.A.3	3A001.A.3
Address bus width	18	18	18
barrel shifter	YES	YES	YES
bit size	24	24	24
boundary scan	YES	YES	YES
maximum clock frequency	80 MHz	80 MHz	66 MHz
External data bus width	24	24	24
Format	FIXED POINT	FIXED POINT	FIXED POINT
Integrated cache	NO	NO	NO
Internal bus architecture	MULTIPLE	MULTIPLE	MULTIPLE
JESD-30 code	S-PBGA-B196	S-PQFP-G144	S-PQFP-G144
JESD-609 code	e0	e0	e0
length	15 mm	20 mm	20 mm
low power mode	YES	YES	YES
Number of DMA channels	6	6	6
Number of external interrupt devices	5	5	5
Number of serial I/Os	2	2	2
Number of terminals	196	144	144
Number of timers	3	3	3
On-chip data RAM width	24	24	24
On-chip program ROM width	24	24	24
Maximum operating temperature	100 °C	100 °C	100 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	BGA	LFQFP	LFQFP
Encapsulate equivalent code	BGA196,14X14,40	QFP144,.87SQ,20	QFP144,.87SQ,20
Package shape	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified
RAM (number of words)	5020	5020	5020
ROM programmability	MROM	MROM	MROM
Maximum seat height	1.75 mm	1.6 mm	1.6 mm
Maximum slew rate	145 mA	145 mA	120 mA
Maximum supply voltage	3.6 V	3.6 V	3.6 V
Minimum supply voltage	3 V	3 V	3 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	BALL	GULL WING	GULL WING
Terminal pitch	1 mm	0.5 mm	0.5 mm
Terminal location	BOTTOM	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	15 mm	20 mm	20 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER

Recommended Resources

Five-digit LED level indication driver integrated circuit typical circuit

Far East brand BCD-185 refrigerator circuit

Monolithic Temperature Sensing Circuit

Thermocouple temperature amplifier circuit

Intelligent "Big Brother" battery charger circuit

Multifunctional audio transcriber

Can't use webServices under wince, please help~~: /-----------------webServices 代码----------------------- using System; using System.Collections.Generic; using System.Web; using System.Web.Services;////// Summary description for testService ///[WebSe...; lghui Embedded System

【CN0235】Fully isolated lithium-ion battery monitoring and protection system: Circuit Functionality and Benefits Lithium-ion (Li-Ion) battery stacks contain a large number of battery cells that must be properly monitored to improve battery efficiency, extend battery life, and e...; EEWORLD社区 ADI Reference Circuit

BT transplantation: need to run in uclinux 2.4, urgent! Cash 5K-1W to buy the original code. Also recruiting embedded development managers. See our company website for details.: As the title says, my company has a project that requires porting BT and emule on uclinux 2.4, which can be purchased with cash. The hardware platform is sigma designs 8623. I hope everyone can help. ...; halien Linux and Android

【R7F0C809】----In-depth understanding (1) Clock: [i=s] This post was last edited by youki12345 on 2015-9-20 11:39 [/i] [size=3]The microcontroller part of the project has come to an end, and I have a certain understanding of R7F0C809. Let me talk ab...; youki12345 Renesas Electronics MCUs

MSP430 MCU Development Record (24): [b][color=#5E7384]This content is originally created by EEWORLD forum user [size=3]tiankai001[/size]. If you need to reprint or use it for commercial purposes, you must obtain the author's consent and...; tiankai001 Microcontroller MCU

Can this blue potentiometer be used for the load of the switching power supply?: [i=s] This post was last edited by electricor on 2018-8-16 22:09 [/i] The power supply output is 5v, and the current requirement is 3A. I want to test whether the current can reach 3A when the voltage...; electricor Power technology

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components