Note 1: Tc measurement point is described in Fig.1.
Condition
V
D
= 13.5~16.5V, Inverter Part
T
j
= 125°C, non-repetitive, less than 2μs
(Note 1)
60Hz, Sinusoidal, AC 1minute, between connected all
pins and heat-sink plate
Ratings
400
-20~+100
-40~+125
2500
Unit
V
°C
°C
V
rms
THERMAL RESISTANCE
Symbol
R
th(j-c)Q
R
th(j-c)F
Parameter
Junction to case thermal
resistance
(Note 2)
Condition
Inverter IGBT part (per 1/6 module)
Inverter FWDi part (per 1/6 module)
Min.
-
-
Limits
Typ.
-
-
Max.
0.88
1.78
Unit
°C/W
°C/W
Note 2: Grease with good thermal conductivity and long-term endurance should be applied evenly with about +100μm~+200μm on the contacting surface
of DIPIPM and heat-sink. The contacting thermal resistance between DIPIPM case and heat sink Rth(c-f) is determined by the thickness and the
thermal conductivity of the applied grease. For reference, Rth(c-f) is about 0.2°C/W (per 1/6 module, grease thickness: 20μm, thermal
conductivity: 1.0W/m•k).
1
March 2011
MITSUBISHI SEMICONDUCTOR < Dual-In-Line Package Intelligent Power Module>
PS21A79
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 1: T
C
MEASUREMENT POINT
Measurement point for Tc
ELECTRICAL CHARACTERISTICS
(T
j
= 25°C, unless otherwise noted)
INVERTER PART
Symbol
V
CE(sat)
V
EC
t
on
t
C(on)
t
off
t
C(off)
t
rr
I
CES
Parameter
Collector-emitter saturation
voltage
FWDi forward voltage
V
D
=V
DB
= 15V
V
IN
= 5V, I
C
= 50A
-I
C
= 50A, V
IN
= 0V
V
CC
= 300V, V
D
= V
DB
= 15V
I
C
= 50A, T
j
= 125°C, V
IN
= 0↔5 V
Inductive Load (upper-lower arm)
T
j
= 25°C
T
j
= 125°C
Condition
T
j
= 25°C
T
j
= 125°C
Min.
-
-
-
1.80
-
-
-
-
-
-
Limits
Typ.
1.55
1.65
1.70
2.40
0.40
3.00
0.60
0.30
-
-
Max.
2.05
2.10
2.20
3.60
0.60
4.20
1.20
-
1
10
Unit
V
V
μs
μs
μs
μs
μs
mA
Switching times
Collector-emitter cut-off
current
V
CE
=V
CES
CONTROL (PROTECTION) PART
Symbol
I
D
I
DB
I
SC
UV
DBt
UV
DBr
UV
Dt
UV
Dr
V
FOH
V
FOL
t
FO
I
IN
V
th(on)
V
th(off)
V
OT
Parameter
Circuit current
Circuit current
Short circuit trip level
Condition
V
D
= 15V, V
IN
= 0V
V
D
= 15V, V
IN
= 5V
V
D
= V
DB
= 15V, V
IN
= 0V
V
UFB
-V
UFS
, V
VFB
-V
VFS,
V
WFB
-V
WFS
V
D
= V
DB
= 15V, V
IN
= 5V
-20°C≤Tj≤125°C, Rs= 40.2Ω (±1%),
(Note 3)
Not connecting outer shunt resistors to
NU,NV,NW terminals
Trip level
P-side
Reset level
T
j
≤125°C
Trip level
N-side
Reset level
V
SC
= 0V, F
O
terminal pull-up to 5V by 10kΩ
V
SC
= 1V, I
FO
= 1mA
C
FO
=22nF
(Note 4)
V
IN
= 5V
Total of V
P1
-V
PC
, V
N1
-V
NC
Applied between U
P
, V
P
, W
P
-V
PC
, U
N
, V
N
, W
N
-V
NC
LVIC temperature = 85°C
(Note 5)
Min.
-
-
-
-
85
10.0
10.5
10.3
10.8
4.9
-
1.6
0.7
2.1
0.8
3.57
Limits
Typ.
-
-
-
-
-
-
-
-
-
-
-
2.4
1.0
2.3
1.4
3.63
Max.
5.50
5.50
0.55
0.55
-
12.0
12.5
12.5
13.0
-
0.95
-
1.5
2.6
2.1
3.69
Unit
mA
A
V
V
V
V
V
V
ms
mA
V
V
V
Control supply under-voltage
protection
Fault output voltage
Fault output pulse width
Input current
ON threshold voltage
OFF threshold voltage
Temperature output
Note 3 : Short circuit protection can work for N-side IGBTs only. Isc level can change by sense resistance. For details, please refer the application note for this
DIPIPM or contact us. And in that case, it should be for sense resistor to be larger resistance than the value mentioned above.
Note
4 : Fault signal is output when short circuit or N-side control supply under-voltage protective functions operate. The fault output pulse-width t
FO
depends on
the capacitance value of C
FO
. (C
FO
(typ.) = t
FO
x (9.1 x 10
-6
) [F])
Note
5 : DIPIPM don't shutdown IGBTs and output fault signal automatically when temperature rises excessively. When temperature exceeds the protective level
that user defined, controller (MCU) should stop the DIPIPM. And this output might exceed 5V when temperature rises excessively, so it is recommended
for protection of control part like MCU to insert a clamp Di between supply (e.g. 5V) for control part and this output. Temperature of LVIC vs. V
OT
output
characteristics is described in Fig.2
2
March 2011
MITSUBISHI SEMICONDUCTOR < Dual-In-Line Package Intelligent Power Module>
PS21A79
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig.2 Temperature of LVIC - V
OT
output characteristics
5.0
4.5
VOT Output (V)
4.26
4.0
3.63
3.5
3.0
2.5
40
50
60
70
80
90
100
110
120
130
LVIC Temperature (°C)
110±10°C
85±3°C
60±10°C
MECHANICAL CHARACTERISTICS AND RATINGS
Parameter
Mounting torque
Terminal pulling strength
Terminal bending strength
Weight
Heat-sink flatness
Note 6: Measurement point of heat-sink flatness
Condition
Mounting screw : M4
Load 19.6N
Load 9.8N, 90deg. bend
Recommended
1.18N・m
EIAJ-
ED-4701
EIAJ-
ED-4701
(Note 6)
Min.
0.98
10
2
-
-50
Limits
Typ.
1.18
-
-
46
-
Max.
1.47
-
-
-
100
Unit
N・m
s
times
g
μm
3
March 2011
MITSUBISHI SEMICONDUCTOR < Dual-In-Line Package Intelligent Power Module>
PS21A79
TRANSFER-MOLD TYPE
INSULATED TYPE
RECOMMENDED OPERATION CONDITIONS
Symbol
V
CC
V
D
V
DB
ΔV
D
,
ΔV
DB
t
dead
f
PWM
I
O
PWIN(on)
PWIN(off)
V
NC
T
j
Minimum input pulse width
Parameter
Supply voltage
Control supply voltage
Control supply voltage
Control supply variation
Arm shoot-through blocking time
PWM input frequency
Allowable r.m.s. current
Condition
Applied between P-NU, NV, NW
Applied between V
P1
-V
PC
, V
N1
-V
NC
Applied between V
UFB
-V
UFS
, V
VFB
-V
VFS
, V
WFB
-V
WFS
For each input signal, T
C
≤
100°C
T
C
≤
100°C, T
j
≤
125°C
V
CC
= 300V, V
D
= 15V, P.F = 0.8,
Sinusoidal PWM
(Note 7)
T
C
≤
100°C, T
j
≤
125°C
Min.
0
13.5
13.0
-1
2.2
-
-
-
1.1
3.0
5.0
-5.0
-20
Limits
Typ.
300
15.0
15.0
-
-
-
-
-
-
-
-
-
-
Max.
400
16.5
18.5
+1
-
20
23.6
13.8
-
-
-
+5.0
+125
V
°C
Unit
V
V
V
V/μs
μs
kHz
Arms
f
PWM
= 5kHz
f
PWM
= 15kHz
V
NC
variation
Junction temperature
(Note 8)
200≤ V
CC
≤
350V, 13.5≤ V
D
≤
16.5V,
I
C
≤50A
13.0≤ V
DB
≤
18.5V, -20°C
≤
T
C
≤
100°C,
N line wiring inductance less than 10nH 50<I
C
≤85A
(Note 9)
Between V
NC
-NU, NV, NW (including surge)
μs
Note 7: The allowable r.m.s. current value depends on the actual application conditions.
8: DIPIPM might not make response to the input on signal with pulse width less than PWIN (on).
9: IPM might make no response or delayed response (at P-side IGBT only) for the input signal with off pulse width less than PWIN(off).
Please refer Fig. 3 about delayed response.
Fig. 3 About Delayed Response Against Shorter Input Off Signal Than PWIN(off)
(P-side only)
P-side Control Input
Internal IGBT Gate
Output Current Ic
Solid line
Broken line
t2
t1
…Off
pulse width
≥
PWIN(off);
Turn on time t1 (Normal delay)
…Off
pulse width < PWIN(off);
Turn on time t2 (Longer delay in some cases)
4
March 2011
MITSUBISHI SEMICONDUCTOR < Dual-In-Line Package Intelligent Power Module>
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