2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
DD
Description
Power Supply Voltage
Input Voltage
Output Voltage
Storage Temperature
Junction Temperature
Max
–0.5 to +3.6
–0.5 to +3.6
–0.5 to V
DD
+0.5
–65 to +165
150
Unit
V
V
V
°C
°C
V
I
V
O
T
STG
T
J
GL
V
DD
GND
G
V
DD
Q
1
GND
A
Q
5
V
DD
GND
V
DD
V
DD
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
V
DD
GND
GND
V
DD
Q
2
GND
Q
3
Q
4
V
DD
GND
GND
V
DD
NC
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE
(1)
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
Parameter
Input Capacitance
Min
Typ.
6
Max.
Unit
pF
—
—
TSSOP
TOP VIEW
NOTE:
1. This parameter is measured at characterization but not tested.
RECOMMENDED OPERATING RANGE
Symbol
T
A
V
DD
Description
Ambient Operating Temperature
Internal Power Supply Voltage
Min.
–40
2.3
Typ.
+25
2.5
Max.
+85
2.7
Unit
°C
V
PIN DESCRIPTION
Symbol
A
G
GL
Qn
V
DD
GND
I/O
I
I
I
O
Type
LVTTL
LVTTL
LVTTL
LVTTL
PWR
PWR
Description
Clock input
Gate control for Qn outputs. When
G
is LOW, these outputs are enabled. When
G
is HIGH, these outputs are asynchronously
disabled to the level designated by GL
(1)
.
Specifies output disable level. If HIGH, the outputs disable HIGH. If LOW, the outputs disable LOW.
Clock outputs
Power supply for the device core, inputs, and outputs
Power supply return for power
NOTE:
1. Because the gate controls are asynchronous, runt pulses are possible. It is the user's responsibility to either time the gate control signals to minimize the possibility of runt
pulses or be able to tolerate them in down stream circuitry.
2
IDT5T9050
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
(1)
Symbol
I
IH
I
IL
V
IK
V
IN
V
IH
V
IL
V
OH
V
OL
Parameter
Input HIGH Current
Input LOW Current
Clamp Diode Voltage
DC Input Voltage
DC Input HIGH
(2)
DC Input LOW
(3)
Output HIGH Voltage
Output LOW Voltage
Test Conditions
V
DD
= 2.7V
V
I
= V
DD
/GND
V
DD
= 2.7V
V
I
= GND/V
DD
V
DD
= 2.3V, I
IN
= -18mA
Min.
—
—
—
- 0.3
1.7
—
V
DD
- 0.4
V
DD
- 0.1
—
—
Typ.
(4)
—
—
- 0.7
Max
±5
±5
- 1.2
+3.6
—
0.7
—
—
0.4
0.1
Unit
µA
V
V
V
V
V
V
V
V
I
OH
= -12mA
I
OH
= -100µA
I
OL
= 12mA
I
OL
= 100µA
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. Voltage required to maintain a logic HIGH.
3. Voltage required to maintain a logic LOW.
4. Typical values are at V
DD
= 2.5V, +25°C ambient.
POWER SUPPLY CHARACTERISTICS
Symbol
I
DDQ
I
DDD
I
TOT
Parameter
Quiescent V
DD
Power Supply Current
Dynamic V
DD
Power Supply
Current per Output
Total Power V
DD
Supply Current
Test Conditions
(1)
V
DD
= Max., Reference Clock = LOW
Outputs enabled, All outputs unloaded
V
DD
= Max., C
L
= 0pF
V
DD
= 2.5V., F
REFERENCE CLOCK
= 100MHz, C
L
= 15pF
V
DD
= 2.5V., F
REFERENCE CLOCK
= 200MHz, C
L
= 15pF
Typ.
1
100
50
75
Max
1.5
150
65
100
Unit
mA
µA/MHz
mA
NOTE:
1. The termination resistors are excluded from these measurements.
INPUT AC TEST CONDITIONS
Symbol
V
IH
V
IL
V
TH
t
R
, t
F
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Timing Measurement Reference Level
(1)
Input Signal Edge Rate
(2)
Value
V
DD
0
V
DD
/2
2
Units
V
V
V
V/ns
NOTES:
1. A nominal 1.25V timing measurement reference level is specified to allow constant, repeatable results in an automatic test equipment (ATE) environment.
2. The input signal edge rate of 2V/ns or greater is to be maintained in the 10% to 90% range of the input waveform.
3
IDT5T9050
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
(4)
Symbol
Skew Parameters
t
SK
(
O
)
t
SK
(
P
)
t
SK
(
PP
)
Propagation Delay
t
PLH
t
PHL
t
R
t
F
Output Rise Time (20% to 80%)
Output Fall Time (20% to 80%)
350
350
—
—
—
—
—
—
—
—
850
850
200
3.5
3
ps
ps
Parameter
Same Device Output Pin-to-Pin Skew
(1)
Pulse Skew
(2)
Part-to-Part Skew
(3)
Propagation Delay A to Qn
Min.
—
—
—
—
Typ.
—
—
—
—
Max
25
300
300
1.8
Unit
ps
ps
ps
ns
f
O
Frequency Range
Output Gate Enable/Disable Delay
t
PGE
t
PGD
Output Gate Enable to Qn
Output Gate Enable to Qn Driven to GL Designated Level
MHz
ns
ns
NOTES:
1. Skew measured between all outputs under identical input and output transitions and load conditions on any one device.
2. Skew measured is the difference between propagation delay times t
PHL
and t
PLH
of any output under identical input and output transitions and load conditions on any one device.
3. Skew measured is the magnitude of the difference in propagation times between any outputs of two devices, given identical transitions and load conditions at identical V
DD
levels
and temperature.
4. Guaranteed by design.
AC TIMING WAVEFORMS
1/fo
t
W
A
t
W
V
IH
V
TH
V
IL
t
PLH
Qn
t
PHL
V
OH
V
TH
V
OL
t
SK(O)
Qm
t
SK(O)
V
OH
V
TH
V
OL
Propagation and Skew Waveforms
NOTE:
Pulse Skew is calculated using the following expression:
t
SK
(
P
) = | t
PHL
- t
PLH
|
where t
PHL
and t
PLH
are measured on the controlled edges of any one output from rising and falling edges of a single pulse. Please note that the t
PHL
and t
PLH
shown are not
valid measurements for this calculation because they are not taken from the same pulse.
4
IDT5T9050
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER JR.
INDUSTRIAL TEMPERATURE RANGE
V
IH
A
V
TH
V
IL
V
IH
GL
V
TH
V
IL
t
PLH
G
V
IH
V
TH
V
IL
t
PGD
t
PG E
V
OH
V
TH
V
OL
Qn
Gate Disable/Enable Showing Runt Pulse Generation
NOTE:
As shown, it is possible to generate runt pulses on gate disable and enable of the outputs. It is the user's responsibility to time their
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