Memory Module Specifications
KVR16R11S8K4/16
16GB (4GB 1Rx8 512M x 72-Bit x 4 pcs.) PC3-12800
CL11 Registered w/Parity 240-Pin DIMM Kit
DESCRIPTION
ValueRAM's KVR16R11S8K4/16 is a kit of four 512M x 72-bit
(4GB) DDR3-1600 CL11 SDRAM (Synchronous DRAM), regis-
tered w/parity, 1Rx8 ECC, memory modules, based on nine
512M x 8-bit FBGA components per module. Total kit capacity
is 16GB. The SPDs are programmed to JEDEC standard
latency DDR3-1600 timing of 11-11-11 at 1.5V. Each 240-pin
DIMM uses gold contact fingers. The electrical and mechanical
specifications are as follows:
SPECIFICATIONS
CL(IDD)
Row Cycle Time (tRCmin)
Refresh to Active/Refresh
Command Time (tRFCmin)
Row Active Time (tRASmin)
Maximum Operating Power
UL Rating
Operating Temperature
Storage Temperature
11 cycles
48.125ns (min.)
260ns (min.)
35ns (min.)
2.814 W* (per module)
94 V - 0
0
o
C to 85
o
C
-55
o
C to +100
o
C
FEATURES
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JEDEC standard 1.5V (1.425V ~1.575V) Power Supply
VDDQ = 1.5V (1.425V ~ 1.575V)
800MHz fCK for 1600Mb/sec/pin
8 independent internal bank
Programmable CAS Latency: 11, 10, 9, 8, 7, 6
Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
8-bit pre-fetch
Burst Length: 8 (Interleave without any limit, sequential with
starting address “000” only), 4 with tCCD = 4 which does not
allow seamless read or write [either on the fly using A12 or
MRS]
Bi-directional Differential Data Strobe
Internal(self) calibration : Internal self calibration through ZQ
pin (RZQ : 240 ohm ± 1%)
On Die Termination using ODT pin
On-DIMM thermal sensor (Grade B)
Average Refresh Period 7.8us at lower than TCASE 85°C,
3.9us at 85°C < TCASE < 95°C
Asynchronous Reset
PCB : Height 1.180” (30.00mm), double sided component
*Power will vary depending on the SDRAM and
Register/PLL used.
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Continued >>
Document No. VALUERAM1376-001.A00
11/20/13
Page 1
DSP and ARM Processors
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