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DMP58D0SV_15

Description
DUAL P-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR
File Size136KB,5 Pages
ManufacturerDiodes
Websitehttp://www.diodes.com/
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DMP58D0SV_15 Overview

DUAL P-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR

DMP58D0SV
DUAL P-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR
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Features
Low On-Resistance
ESD Protected Gate to 500V
Low Input Capacitance
Fast Switching Speed
Lead Free By Design/RoHS Compliant (Note 3)
“Green” Device (Note 4)
Qualified to AEC-Q 101 Standards for High Reliability
Mechanical Data
SOT-563
D
2
G
1
S
1
Case: SOT-563
Case Material: Molded Plastic, "Green" Molding Compound.
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020D
Terminals: Finish
Matte Tin annealed over Copper leadframe.
Solderable per MIL-STD-202, Method 208
Terminal Connections: See Diagram
Marking Information: See Page 3
Ordering Information: See Page 3
Weight: 0.006 grams (approximate)
S
2
G
2
D
1
ESD protected to 500V
TOP VIEW
TOP VIEW
Internal Schematic
Maximum Ratings
@T
A
= 25°C unless otherwise specified
Symbol
V
DSS
V
DGR
V
GSS
I
D
Value
-50
-50
±20
-160
Units
V
V
V
mA
Characteristic
Drain-Source Voltage
Drain-Gate Voltage (Note 1)
Gate-Source Voltage
Drain Current (Note 2)
Continuous
Continuous
Thermal Characteristics
@T
A
= 25°C unless otherwise specified
Symbol
P
D
R
θ
JA
T
J
, T
STG
Value
400
313
-55 to +150
Units
mW
°C/W
°C
Characteristic
Total Power Dissipation (Note 2)
Thermal Resistance, Junction to Ambient (Note 2)
Operating and Storage Temperature Range
Electrical Characteristics
Characteristic
OFF CHARACTERISTICS (Note 5)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transconductance
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Notes:
@T
A
= 25°C unless otherwise specified
Symbol
BV
DSS
I
DSS
I
GSS
V
GS(th)
R
DS (ON)
g
FS
C
iss
C
oss
C
rss
Min
-50
-0.8
0.05
Typ
6
27
4
1.4
Max
-1
±5
-2.1
8
Unit
V
μA
μA
V
Ω
S
pF
pF
pF
Test Condition
V
GS
= 0V, I
D
= -250μA
V
DS
= -50V, V
GS
= 0V
V
GS
=
±20V,
V
DS
= 0V
V
DS
= V
GS
, I
D
= -250μA
V
GS
= -5V, I
D
= -0.100A
V
DS
= -25V, I
D
= -0.1A
V
DS
= -25V, V
GS
= 0V, f = 1.0MHz
1. R
GS
20KΩ.
2. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch; pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which
can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.
3. No purposefully added lead.
4. Diodes Inc’s “Green” policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.
5. Short duration pulse test used to minimize self-heating effect.
DMP58D0SV
Document number: DS31293 Rev. 4 - 2
1 of 5
www.diodes.com
July 2009
© Diodes Incorporated

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