71M024L100LM datasheet, PDF - EEWORLD Datasheet

71M024L100LM: DescriptionStandard SRAM, 128KX8, 100ns, CMOS, CQCC32, 0.400 X 0.820 INCH, CERAMIC, LCC-32; Categorystorage storage; File Size775KB，8 Pages; ManufacturerIDT (Integrated Device Technology)

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71M024L100LM Overview

Standard SRAM, 128KX8, 100ns, CMOS, CQCC32, 0.400 X 0.820 INCH, CERAMIC, LCC-32

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
package instruction	0.400 X 0.820 INCH, CERAMIC, LCC-32
Reach Compliance Code	not_compliant
Maximum access time	100 ns
I/O type	COMMON
JESD-30 code	R-CQCC-N32
JESD-609 code	e0
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	128KX8
Output characteristics	3-STATE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN
Encapsulate equivalent code	LCC32,.45X.55
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Filter level	MIL-STD-883 Class B
Maximum standby current	0.0002 A
Minimum standby current	2 V
Maximum slew rate	0.1 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30

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