Input voltage range guaranteed by common-mode rejection test.
2
Guaranteed by design.
3
Gain tempco does not include the effects of external component drift.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
1, 2
Supply Voltage
±
18 V
Common-Mode Input Voltage [(V–) – 60 V] to [(V+) + 60 V]
Differential Input Voltage
[(V–) – 60 V] to [(V+) + 60 V]
Output Short-Circuit Duration
Continuous
Operating Temperature Range
–40°C to +85°C
Storage Temperature Range
–65°C to +150°C
Function Temperature Range
–65°C to +150°C
Lead Temperature (Soldering, 10 sec)
300°C
Package Type
8-Lead Plastic DIP (P)
16-Lead SOIC (S)
JA
3
JC
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
3
θ
JA
is specified for worst case mounting conditions, i.e.,
θ
JA
is specified for
device in socket for P-DIP package;
θ
JA
is specified for device soldered to
printed circuit board for SOIC package.
Unit
°C/W
°C/W
96
92
37
27
ORDERING GUIDE
Model
AMP02EP
AMP02FP
AMP02AZ/883C
AMP02FS
AMP02GBC
AMP02FS-REEL
V
IOS
max @ V
OOS
max @ Temperature
T
A
= 25 C
T
A
= 25 C
Range
100
µV
200
µV
200
µV
200
µV
200
µV
4 mV
8 mV
10 mV
8 mV
8 mV
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
Package
Description
8-Lead Plastic DIP
8-Lead Plastic DIP
8-Lead CERDIP
16-Lead SOIC
Die
16-Lead SOIC
V+
25k
SENSE
25k
25k
OUT
25k
REFERENCE
–IN
+IN
R
G1
R
G2
V–
Figure 2. Simplified Schematic
REV. E
–3–
AMP02
8
1. RG
1
2. –IN
3. +IN
4. V–
5. REFERENCE
6. OUT
7. V+
8. RG
2
9. SENSE
CONNECT SUBSTRATE TO V–
1
DIE SIZE 0.103 inch 0.116 inch, 11,948 sq. mils
(2.62 mm 2.95 mm, 7.73 sq. mm)
NOTE: PINS 1 and 8 are KELVIN CONNECTED
Die Characteristics
WAFER TEST LIMITS*
(@ V =
S
15 V, V
CM
= 0 V, T
A
= 25 C, unless otherwise noted.)
Conditions
AMP02 GBC
Limits
200
8
V
S
=
±
4.8 V to
±
18 V
G = 1000
G = 100
G = 10
G=1
110
110
95
75
20
10
Guaranteed by CMR Tests
V
CM
=
±
11 V
G = 1000
G = 100
G = 10
G=1
G
=
50 kΩ
+
1, G
=
1000
R
G
Parameter
Input Offset Voltage
Output Offset Voltage
Symbol
V
IOS
V
OOS
Unit
µV
max
mV max
Power Supply
Rejection
Input Bias Current
Input Offset Current
Input Voltage Range
PSR
dB
I
B
I
OS
IVR
nA max
nA max
V min
±
11
110
110
95
75
0.7
±
12
6
Common-Mode
Rejection
CMR
dB
Gain Equation Accuracy
Output Voltage Swing
Supply Current
V
OUT
I
SY
% max
V min
mA max
R
L
= 1 kΩ
*Electrical
tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not
guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AMP02 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
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