ADM1014_15 datasheet, PDF - EEWORLD Datasheet

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ADM1014_15: DescriptionDual PCI Hot-Plug Controller; File Size158KB，12 Pages; ManufacturerADI; Websitehttps://www.analog.com

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ADM1014_15 Overview

Dual PCI Hot-Plug Controller

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PRELIMINARY TECHNICAL DATA

Preliminary Technical Data

PAUXONA

Dual PCI Hot-Plug Controller

ADM1014

AUXGA

3.3V Cmos

Input

+3.3VAux

P-CHANNEL

MOSFET

AUXINA

FAUXA

RESET

3.3V Cmos

Output

FAULT

LATCH

SET

AUXINA

3.3VAUX

POWER-ON

RESET

OVERCURRENT AND

UNDERVOLTAGE

COMPARATORS

FOR +3.3VAUX

AUXOA

AUXINA

100µA

VOCSET

LOW WHEN

AUXINA < 2.5V

CHANNEL A

CIRCUIT OPERATES FROM 3.3VAUX POWER SUPPLY

3V5VGA

OCSET

COMMON TO BOTH CHANNELS

EXTERNAL

N-CHANNEL

POWER

MOSFETS

+5V

+3.3V

CIRCUIT OPERATES FROM 3.3VAUX AND +12V POWER SUPPLY

CHANNEL A

OVERCURRENT AND

UNDERVOLTAGE

COMPARATORS

FOR +5V

5VSA

RSENSE5A

5VISENA

PWRONA

OVERCURRENT AND

UNDERVOLTAGE

COMPARATORS

FOR +3.3V

3VSA

3VISENA

RSENSE3A

12VGA

RESET

OVERCURRENT AND

UNDERVOLTAGE

COMPARATORS

FOR +12V

FLTNA

FAULT

LATCH

SET

P-CHANNEL

MOSFET

12VIN

+5V

OUTA

+3.3V

OUTA

12VOA

-12VGA

-12VINA

12VIN

REGULATOR

GND

12VIN

12V IN

POWER-ON

RESET

LOW WHEN

12VINA <

10V

COMBINING

LOGIC

COMMON TO BOTH CHANNELS

N-CHANNEL

MOSFET

OVERCURRENT

COMPARATOR

FOR -12V

-12VOA

AUXGB

AUXINB

EXTERNAL

N-CHANNEL

POWER

MOSFETS

+3.3V

+5V

AUXOB

PAUXONB

3V5VGB

+3.3VAux

CHANNEL B

FAUXB

5VSB

5VISENB

RSENSE5B

( IDENTICAL TO CHANNEL A )

3VSB

3VISENB

PWRONB

RSENSE3B

FLTNB

12VGB

12VINB

12VOB

-12VGB

-12VINB

+5V

OUTA

+3.3V

OUTA

-12VOB

FUNCTIONAL BLOCK DIAGRAM

REV. PrN 1/02

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

Hot Plug is a trademark of Core International, Inc.

P.O.

Box

9106,

Norwood,

02062-9106, U.S.A.

www.analog.com

One Technology Way,

Tel:

781/329-4700

Fax: 781/326-8703

PRELIMINARY TECHNICAL DATA

ADM1014

PIN FUNCTION DESCRIPTION

Mnemonic

M12VOA

M12VGA

Function

Switched -12V output for channel A. Rated for 100mA.

Gate of channel A internal NMOS transistor. A capacitor connected from this pin to -12VOA (pin 1)

sets the start-up ramp for the +12V supply. During turn-on, this capacitor is charged from a 25µA

current source.

Power on control for channel A. 3.3V CMOS-compatible logic input controls all four main supplies.

PWRONA high = outputs on, PWRONA low = outputs off.

Active-low,

compatible, Open Drain fault output for channel A. A pull-up resistor connects the

pin to 3.3VAux. 4.7k is recommended for this function. An optional capacitor may be connected

from this pin to GND to provide improved immunity to power supply transients.

Active-low,

3.3V

compatible, Open Drain fault output for Aux channel A. The same pull-up resistor

as that on FLTNA connects the pin to 3.3VAux.

Overcurrent set for all 10 outputs. A resistor connected from this pin to ground sets the overcurrent

trip point of all eight supplies. All eight overcurrent trip-points can be programmed by changing the

value of this resistor. The default value of 6.04k , ±1% is compatible with the maximum currents

allowed by the PCI specification.

Gate of channel A +3.3VAUX internal PMOS transistor. A capacitor connected from this pin to

AUXOA (pin 8) sets the start-up ramp for the +3.3VAUX supply. During turn-on, this capacitor is

charged from a 25µA current source.

Switched 3.3V auxiliary output for channel A. Rated for 0.375A.

Gate of channel A internal PMOS transistor. A capacitor connected from this pin to 12VOA (pin 10)

sets the start-up ramp for the +12V supply. During turn-on, this capacitor is charged from a 25µA

current source. The undervoltage circuitry is disabled when the voltage on 12VGA rises above 1.2V.

If the capacitor on pin 7 (AUXGA) or pin 33 (3V5VGA) is more than 25% larger than the capacitor on

pin 9 (12VGA) a false undervoltage condition may be detected during startup.

Switched 12V output for channel A. Rated for 0.5A.

Switched 12V output for channel B. Rated for 0.5A.

Gate of channel B internal PMOS transistor. A capacitor connected from this pin to 12VOB (pin 11)

sets the start-up ramp for the +12V supply. During turn-on, this capacitor is charged from a 25µA

current source. The undervoltage circuitry is disabled when the voltage on 12VGB rises above 1.2V.

If the capacitor on the pin 25 (3V5VGB) or pin 14 (AUXGB) is more than 25% larger than the

capacitor on pin 12 (12VGB) a false undervoltage condition may be detected during startup.

Switched 3.3V auxiliary output for channel B. Rated for 0.375A.

Gate of channel B +3.3VAUX internal PMOS transistor. A capacitor connected from this pin to

AUXOB (pin 13) sets the start-up ramp for the +3.3VAUX supply. During turn-on, this capacitor is

charged from a 25µA current source.

Active-low,

3.3V

compatible, Open Drain fault output for Aux channel B. The same pull-up resistor

as that on FLTNA connects the pin to 3.3VAux.

Active-low,

compatible, Open Drain fault output for channel B. A pull-up resistor connects the

pin to 3.3VAux. 4.7k is recommended for this function. An optional capacitor may be connected

from this pin to GND to provide improved immunity to power supply transients.

Power on control for channel B. 3.3V CMOS-compatible logic input controls all four main supplies.

PWRONB high = outputs on, PWRONB low = outputs off.

Gate of channel B internal NMOS transistor. A capacitor connected from this pin to -12VOB (pin 19)

sets the start-up ramp for the +12V supply. During turn-on, this capacitor is charged from a 25µA

current source.

Switched -12V output for channel B. Rated for 100mA.

PWRONA

FLTNA

FAUXA

OCSET

AUXGA

AUXOA

12VGA

12VOA

12VOB

12VGB

AUXOB

AUXGB

FAUXB

FLTNB

PWRONB

M12VGB

M12VOB

REV. PrN 1/02

–5–

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