I
2
C-Compatible, Wide Bandwidth,
Five 2:1 Multiplexer
ADG795A/ADG795G
FEATURES
Bandwidth: 325 MHz
Low insertion loss and on resistance: 2.6 Ω typical
On resistance flatness: 0.3 Ω typical
Single 3 V/5 V supply operation
3.3 V analog signal range (5 V supply, 75 Ω load)
Low quiescent supply current: 1 nA typical
Fast switching times: t
ON
= 186 ns, t
OFF
= 177 ns
ESD protection
4 kV human body model (HBM)
200 V machine model (MM)
1 kV field-induced charged device model (FICDM)
2
I C®-compatible interface
Compact 24-lead LFCSP
FUNCTIONAL BLOCK DIAGRAMS
V
DD
GND
V
DD
GND
ADG795A
S1A
D1
S1B
S2A
D2
S2B
S3A
S3B
S4A
S4B
S5A
S5B
S2B
S3A
S3B
S4A
S4B
S5A
S5B
S1B
S2A
S1A
ADG795G
D1
D2
TE
D3
D4
D5
I
2
C SERIAL
INTERFACE
I
2
C SERIAL
INTERFACE
A0
A1
A2 SDA SCL
A0
A1
A2 SDA SCL
D3
D4
D5
APPLICATIONS
S-Video RGB/YPbPr video switches
HDTV
Projection TV
DVD-R/RW
AV receivers
LE
1.
2.
3.
4.
5.
6.
GPO1
06034-001
Figure 1.
GENERAL DESCRIPTION
The ADG795A/ADG795G are monolithic CMOS devices
comprising five 2:1 multiplexers/demultiplexers controllable via
a standard I
2
C serial interface. The CMOS process provides
ultralow power dissipation, yet gives high switching speed and
low on resistance.
The on-resistance profile is very flat over the full analog input
range and wide bandwidth ensures excellent linearity and low
distortion. These features, combined with a wide input signal
range make the ADG795A/ADG795G the ideal switching
solution for a wide range of TV applications including S-video,
RGB and YPbPr video switches.
SO
that allow up to eight devices on the same bus. This allows the
user to expand the capability of the device by increasing the size
of the switching array.
The ADG795A/ADG795G operate from a single 3 V or 5 V
supply voltage and are available in a compact 4 mm × 4 mm
body, 24-lead, lead-free package (LFCSP).
B
PRODUCT HIGHLIGHTS
Wide bandwidth: 325 MHz.
Ultralow power dissipation.
Extended input signal range.
Integrated I
2
C serial interface.
Compact 4 mm × 4 mm, 24-lead, lead-free LFCSP.
ESD protection tested as per ESD Association standards:
4 kV HBM (ANSI/ESD STM5.1-2001)
200 V MM (ANSI/ESD STM5.2-1999)
1 kV FICDM (ANSI/ESDSTM5.3.1-1999)
The switches conduct equally well in both directions when on.
In the off condition, signal levels up to the supplies are blocked.
The ADG795A/ADG795G switches exhibit break-before-make
switching action. The ADG795G has one general-purpose logic
output pins controlled by the I
2
C interface that can also be used
to control other non-I
2
C-compatible devices such as video filters.
The integrated I
2
C interface provides a large degree of flexibility
in the system design. It has three configurable I
2
C address pins
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
O
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
ADG795A/ADG795G
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagrams............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Specifications..................................................................................... 3
I
2
C Timing Specifications ................................................................ 7
Timing Diagram ........................................................................... 8
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configuration and Function Descriptions........................... 10
Typical Performance Characteristics ........................................... 11
Terminology .................................................................................... 16
Theory of Operation ...................................................................... 17
I
2
C Serial Interface ..................................................................... 17
I
2
C Address.................................................................................. 17
Write Operation.......................................................................... 17
LDSW bit..................................................................................... 19
Power On/Software Reset.......................................................... 19
Read Operation........................................................................... 19
Evaluation Board ............................................................................ 20
Using the ADG795G Evaluation Board .................................. 20
Outline Dimensions ....................................................................... 23
Ordering Guide .......................................................................... 23
Test Circuits..................................................................................... 14
REVISION HISTORY
7/06—Revision 0: Initial Version
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Rev. 0 | Page 2 of 24
B
SO
LE
TE
ADG795A/ADG795G
SPECIFICATIONS
V
DD
= 5 V ± 10%, GND = 0 V, T
A
= −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
2
On Resistance, R
ON
On-Resistance Matching Between
Channels, ∆R
ON
On-Resistance Flatness, R
FLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage (I
S(OFF)
)
Drain Off Leakage (I
D(OFF)
)
Channel On Leakage (I
D(ON)
, I
S(ON)
)
DYNAMIC CHARACTERISTICS
3
t
ON
, t
ENABLE
t
OFF
, t
DISABLE
Break-Before-Make Time Delay, t
D
I
2
C-to-GPO Propagation Delay, t
H
, t
L
Off Isolation
Channel-to-Channel Crosstalk
Same Multiplexer
Different Multiplexer
−3 dB Bandwidth
THD + N
Charge Injection
C
S(OFF)
C
D(OFF)
C
D(ON)
, C
S(ON)
Power Supply Rejection Ratio, PSRR
Differential Gain Error
Differential Phase Error
LOGIC INPUTS
3
A0, A1, A2
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Input Capacitance, C
IN
SCL, SDA
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Leakage Current, I
IN
Input Hysteresis
Input Capacitance, C
IN
Conditions
V
S
= V
DD
, R
L
= 1 MΩ
V
S
= V
DD
, R
L
= 75 Ω
V
D
= 0 V, I
DS
= −10 mA, see Figure 22
V
D
= 0 V to 1 V, I
DS
= −10 mA, see Figure 22
V
D
= 0 V, I
DS
= −10 mA
V
D
= 1 V, I
DS
= −10 mA
V
D
= 0 V to 1 V, I
DS
= −10 mA
Min
0
0
2.2
0.15
Typ
1
Max
4
3.3
3.5
4
0.5
0.6
0.55
Unit
V
V
Ω
Ω
Ω
Ω
Ω
nA
nA
nA
ns
ns
ns
ns
dB
dB
dB
MHz
%
pC
pF
pF
pF
dB
%
Degrees
V
D
= 4 V/1 V, V
S
= 1 V/4 V, see Figure 23
V
D
= 4 V/1 V, V
S
= 1 V/4 V, see Figure 23
V
D
= V
S
= 4 V/1 V, see Figure 24
LE
1
2.0
0.7 × V
DD
−0.3
Rev. 0 | Page 3 of 24
C
L
= 35 pF, R
L
= 50 Ω, V
S
= 2 V, see Figure 28
C
L
= 35 pF, R
L
= 50 Ω, V
S
= 2 V, see Figure 28
C
L
= 35 pF, R
L
= 50 Ω, V
S1
= V
S2
= 2 V, see Figure
29
ADG795G only
f
= 10 MHz, R
L
= 50 Ω, see Figure 26
f
= 10 MHz, R
L
= 50 Ω, see Figure 27
O
B
SO
f
= 20 kHz
CCIR330 test signal
CCIR330 test signal
V
IN
= 0 V to V
DD
V
IN
= 0 V to V
DD
R
L
= 50 Ω, see Figure 25
R
L
= 100 Ω
C
L
= 1 nF, V
S
= 0 V, see Figure 30
TE
0.3
±0.25
±0.25
±0.25
186
177
3
−60
−55
−70
325
0.14
5
10
13
27
70
0.32
0.44
0.005
3
0.005
0.05 × V
DD
3
250
240
130
0.8
±1
V
V
μA
pF
V
V
μA
V
pF
V
DD
+ 0.3
+0.3 × V
DD
±1
ADG795A/ADG795G
Parameter
LOGIC OUTPUTS
3
SDA Pin
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
GPO1 Pin and GPO2 Pin
Output Low Voltage, V
OL
Output High Voltage, V
OH
POWER REQUIREMENTS
I
DD
Conditions
Min
Typ
1
Max
Unit
I
SINK
= 3 mA
I
SINK
= 6 mA
0.4
0.6
±1
10
0.4
2.0
0.001
1
0.2
0.7
V
V
μA
pF
V
V
μA
mA
mA
I
LOAD
= +2 mA
I
LOAD
= −2 mA
Digital inputs = 0 V or V
DD
, I
2
C interface
inactive
I
2
C interface active, f
SCL
=400 kHz
I
2
C interface active, f
SCL
=3.4 MHz
1
2
All typical values are at T
A
= 25°C, unless otherwise stated.
Guaranteed by initial characterization, not subject to production test.
3
Guaranteed by design, not subject to production test.
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Rev. 0 | Page 4 of 24
B
SO
LE
TE
ADG795A/ADG795G
V
DD
= 3 V ± 10%, GND = 0 V, T
A
= −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
2
On Resistance, R
ON
On-Resistance Matching Between
Channels, ∆R
ON
On-Resistance Flatness, R
FLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage (I
S(OFF)
)
Drain Off Leakage (I
D(OFF)
)
Channel On Leakage (I
D(ON)
, I
S(ON)
)
DYNAMIC CHARACTERISTICS
3
t
ON
, t
ENABLE
t
OFF
, t
DISABLE
Break-Before-Make Time Delay, t
D
I
2
C-to-GPO Propagation Delay, t
H
, t
L
Off Isolation
Channel-to-Channel Crosstalk
Same Multiplexer
Different Multiplexer
−3 dB Bandwidth
THD + N
Charge Injection
C
S(OFF)
C
D(OFF)
C
D(ON)
, C
S(ON)
Power Supply Rejection Ratio, PSRR
Differential Gain Error
Differential Phase Error
LOGIC INPUTS
3
A0, A1, A2
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Input Capacitance, C
IN
SCL, SDA
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Leakage Current, I
IN
Input Hysteresis
Input Capacitance, C
IN
Conditions
V
S
=V
DD
, R
L
=1MΩ
V
S
=V
DD
, R
L
=75Ω
V
D
= 0 V, I
DS
= −10 mA, see Figure 22
V
D
= 0 V to 1 V, I
DS
= −10 mA, see Figure 22
V
D
= 0 V, I
DS
= −10 mA
V
D
= 1 V, I
DS
= −10 mA
V
D
= 0 V to 1 V, I
DS
= −10 mA
V
D
= 2 V/1 V, V
S
= 1 V/2 V, see Figure 23
V
D
= 2 V/1 V, V
S
= 1 V/2 V, see Figure 23
V
D
= V
S
= 2 V/1 V, see Figure 24
Min
0
0
2.2
0.15
Typ
1
Max
2.2
1.7
4
6
0.6
1.1
2.8
Unit
V
V
Ω
Ω
Ω
Ω
Ω
nA
nA
nA
ns
ns
ns
ns
dB
dB
dB
MHz
%
pC
pF
pF
pF
dB
%
Degree
s
0.3
±0.25
±0.25
±0.25
LE
2.0
0.7 × V
DD
−0.3
Rev. 0 | Page 5 of 24
C
L
= 35 pF, R
L
= 50 Ω, V
S
= 2 V, see Figure 28
C
L
= 35 pF, R
L
= 50 Ω, V
S
= 2 V, see Figure 28
C
L
= 35 pF, R
L
= 50 Ω, V
S1
= V
S2
= 2 V, see Figure 29
ADG795G only
f
= 10 MHz, R
L
= 50 Ω, see Figure 26
f
= 10 MHz, R
L
= 50 Ω, see Figure 27
B
SO
f
= 20 kHz
CCIR330 test signal
CCIR330 test signal
V
IN
= 0 V to V
DD
V
IN
= 0 V to V
DD
R
L
= 50 Ω, see Figure 25
R
L
= 100 Ω
C
L
= 1 nF, V
S
= 0 V, see Figure 30
TE
1
198
195
3
−60
−55
−70
310
0.14
2.5
10
13
27
70
0.28
0.28
0.005
3
0.005
0.05 × V
DD
3
270
260
121
O
0.8
±1
V
V
μA
pF
V
V
μA
V
pF
V
DD
+ 0.3
+0.3 × V
DD
±1
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