Data Sheet
FEATURES
Extremely low harmonic distortion (HD)
−112 dBc HD2 @ 10 MHz
−84 dBc HD2 @ 70 MHz
−77 dBc HD2 @ 100 MHz
−102 dBc HD3 @ 10 MHz
−91 dBc HD3 @ 70 MHz
−84 dBc HD3 @ 100 MHz
Low input voltage noise: 2.2 nV/√Hz
High speed
−3 dB bandwidth of 1.9 GHz, G = 1
Slew rate: 6000 V/µs, 25% to 75%
Fast overdrive recovery of 1 ns
0.5 mV typical offset voltage
Externally adjustable gain
Differential-to-differential or single-ended-to-differential
operation
Adjustable output common-mode voltage
Single-supply operation: 3.3 V to 5 V
Ultralow Distortion
Differential ADC Driver
ADA4937-1/ADA4937-2
FUNCTIONAL BLOCK DIAGRAMS
16 –V
S
15 –V
S
13 –V
S
12 PD
11 –OUT
10 +OUT
9 V
OCM
–FB 1
+IN 2
–IN 3
+FB 4
ADA4937-1
14 –V
S
+V
S
7
+V
S
8
Figure 1.
ADA4937-1
+IN1
–FB1
–V
S1
–V
S1
PD1
–OUT1
–IN1
+FB1
+V
S1
+V
S1
–FB2
+IN2
1
2
3
4
5
6
24
23
22
21
20
19
ADA4937-2
18
17
16
15
14
13
+OUT1
V
OCM1
–V
S2
–V
S2
PD2
–OUT2
–IN2
+FB2
+V
S2
+V
S2
V
OCM2
+OUT2
APPLICATIONS
ADC drivers
Single-ended-to-differential converters
IF and baseband gain blocks
Differential buffers
Line drivers
7
8
9
10
11
12
Figure 2.
ADA4937-2
–55
–60
–65
–70
HD2,
HD3,
HD2,
HD3,
V
S
= 5.0V
V
S
= 5.0V
V
S
= 3.3V
V
S
= 3.3V
GENERAL DESCRIPTION
The
ADA4937-xis
a low noise, ultralow distortion, high speed
differential amplifier. It is an ideal choice for driving high
performance ADCs with resolutions up to 16 bits from dc to
100 MHz. The adjustable level of the output common mode
allows the
ADA4937-x
to match the input of the ADC. The
internal common-mode feedback loop also provides exceptional
output balance as well as suppression of even-order harmonic
distortion products.
With the
ADA4937-x,
differential gain configurations are easily
realized with a simple external feedback network of four resis-
tors that determine the closed-loop gain of the amplifier.
The
ADA4937-x
is fabricated using Analog Devices, Inc., proprie-
tary silicon-germanium (SiGe), complementary bipolar process,
enabling it to achieve very low levels of distortion with an input
voltage noise of only 2.2 nV/√Hz. The low dc offset and excellent
dynamic performance of the
ADA4937-x
make it well-suited
for a wide variety of data acquisition and signal processing appli-
cations.
Rev. D
Document Feedback
DISTORTION (dBc)
–75
–80
–85
–90
–95
–100
–105
–110
1
10
FREQUENCY (MHz)
100
06591-003
–115
Figure 3. Harmonic Distortion vs. Frequency
The
ADA4937-x
is available in a Pb-free, 3 mm × 3 mm, 16-lead
LFCSP (ADA4937-1, single) or a Pb-free, 4 mm × 4 mm, 24-lead
LFCSP (ADA4937-2, dual). The pinout has been optimized to
facilitate PCB layout and minimize distortion. The
ADA4937-x
is specified to operate over the automotive (−40°C to +105°C)
temperature range and between 3.3 V and 5 V supplies.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2007–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
06591-002
06591-001
+V
S
5
+V
S
6
IMPORTANT LINKS for the
ADA4937-1_4937-2*
Last content update 08/29/2013 11:25 am
PARAMETRIC SELECTION TABLES
Find Similar Products By Operating Parameters
High Speed Amplifiers Selection Table
DESIGN TOOLS, MODELS, DRIVERS & SOFTWARE
ADI DiffAmpCalc™
ADA4937 SPICE Macro Model
DOCUMENTATION
AN-1026:
High Speed Differential ADC Driver Design Considerations
AN-0990:
Terminating a Differential Amplifier in Single-Ended Input
Applications
AN-0992:
Active Filter Evaluation Board for Differential Amplifiers
AN-282:
Fundamentals of Sampled Data Systems
AN-649:
Using the Analog Devices Active Filter Design Tool
AN-584:
Using the AD813X Differential Amplifier
AN-589:
Ways to Optimize the Performance of a Difference Amplifie
MT-218:
Multiple Feedback Band-Pass Design Example
MT-076:
Differential Driver Analysis
MT-075:
Differential Drivers for High Speed ADCs Overview
Designing 1-ppm DAC Accuracy into Instrumentation Applications
Part 1
Designing 1-ppm DAC Accuracy into Instrumentation Applications
Part 2
“Rules of the Road” for High-Speed Differential ADC Drivers
RF Source Booklet
FOR THE ADA4937-1
CN-0051:
Driving the AD9233/9246/9254 ADCs in AC-Coupled
Baseband Applications
A Stress-Free Method for Choosing High-Speed Op Amps
UG-132:
Evaluation Board User Guide for the ADA492x-1 and
ADA493x-1 Family of Differential Amplifiers
Ask The Application Engineer 36, Wideband A/D Converter Front-End
Design Considerations II: Amplifier-or Transformer Drive for the ADC?
FOR THE ADA4937-2
UG-018:
Evaluation Board for Dual High Speed Differential Amplifiers
PRODUCT RECOMMENDATIONS & REFERENCE DESIGNS
CN-0051:
Driving the AD9233/9246/9254 ADCs in AC-Coupled
Baseband Applications
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Quality and Reliability
Lead(Pb)-Free Data
SAMPLE & BUY
EVALUATION KITS & SYMBOLS & FOOTPRINTS
View the Evaluation Boards and Kits page for the ADA4937-1
View the Evaluation Boards and Kits page for the ADA4937-2
Symbols and Footprints for the ADA4937-1
Symbols and Footprints for the ADA4937-2
ADA4937-1
ADA4937-2
View Price & Packaging
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ADA4937-1/ADA4937-2
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
5 V Operation ............................................................................... 3
3.3 V Operation ............................................................................ 5
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution .................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ............................................. 9
Test Circuits ..................................................................................... 16
Terminology .................................................................................... 17
Theory of Operation ...................................................................... 18
Data Sheet
Analyzing an Application Circuit ............................................ 18
Setting the Closed-Loop Gain .................................................. 18
Estimating the Output Noise Voltage ...................................... 18
Impact of Mismatches in the Feedback Networks ................. 19
Calculating the Input Impedance for an Application
Circuit .......................................................................................... 19
Input Common-Mode Voltage Range in Single-Supply
Applications ................................................................................ 20
Setting the Output Common-Mode Voltage .......................... 20
Power-Down Operation ............................................................ 20
Layout, Grounding, and Bypassing .............................................. 22
High Performance ADC Driving ................................................. 23
3.3 V Operation .......................................................................... 25
Outline Dimensions ....................................................................... 26
Ordering Guide .......................................................................... 26
REVISION HISTORY
8/13—Rev. C to Rev. D
Changes to Input Bias Current Parameter, Table 1 ...................... 3
Changes to Input Bias Current Parameter, Table 3 ...................... 5
Updated Outline Dimensions ....................................................... 26
3/10—Rev. B to Rev. C
Changes to Table 2, Power Supply Parameter ............................... 4
Changes to Table 4, Power Supply Parameter ............................... 6
Changes to Figure 43 ...................................................................... 15
Added the Power-Down Operation Section ............................... 20
10/09—Rev. A to Rev. B
Changes to General Description Section ...................................... 1
Changes to Table 1 ............................................................................ 3
Changes to Operating Temperature Range Parameter, Table 2 .. 4
Changes to Table 3 ............................................................................ 5
Changes to Figure 4 .......................................................................... 7
Changes to Figure 5 and Figure 6 ................................................... 8
Added EP Row to Table 7 and EP Row to Table 8........................ 8
Added Figure 46, Figure 47, and Figure 48; Renumbered
Sequentially ..................................................................................... 15
Changes to Table 9 .......................................................................... 18
Changes to Input Common-Mode Voltage Range in Single-
Supply Applications Section .......................................................... 20
Changes to Ordering Guide .......................................................... 26
11/07—Rev. 0 to Rev. A
Added the ADA4937-2 ...................................................... Universal
Changes to Features ..........................................................................1
Changes to Specifications .................................................................3
Changes to Figure 4 ...........................................................................7
Changes to Typical Performance Characteristics..........................9
Inserted Figure 44 ........................................................................... 15
Added the Terminating a Single-Ended Input Section ............. 19
Changes to Table 10 and Table 11 ................................................ 21
Changes to Layout, Grounding, and Bypassing Section ........... 22
Inserted Figure 59, Figure 60, and Figure 61 .............................. 22
Updated Outline Dimensions ....................................................... 26
Changes to Ordering Guide .......................................................... 26
5/07—Revision 0: Initial Version
Rev. D | Page 2 of 28
Data Sheet
SPECIFICATIONS
5 V OPERATION
ADA4937-1/ADA4937-2
T
A
= 25°C, +V
S
= 5 V, −V
S
= 0 V, V
OCM
= +V
S
/2, R
T
= 61.9 Ω, R
G
= R
F
= 200 Ω, G = +1, R
L, dm
= 1 kΩ, unless otherwise noted. All specifica-
tions refer to single-ended input and differential outputs, unless otherwise noted.
±D
IN
to ±OUT Performance
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
Bandwidth for 0.1 dB Flatness
Large Signal Bandwidth
Slew Rate
Settling Time
Overdrive Recovery Time
NOISE/HARMONIC PERFORMANCE
Second Harmonic
Test Conditions/Comments
V
OUT, dm
= 0.1 V p-p
V
OUT, dm
= 0.1 V p-p
V
OUT, dm
= 2 V p-p
V
OUT, dm
= 2 V p-p; 25% to 75%
V
OUT, dm
= 2 V p-p
V
IN
= 0 V to 1.5 V step; G = 3.16
See Figure 51 for distortion test circuit
V
OUT, dm
= 2 V p-p; 10 MHz
V
OUT, dm
= 2 V p-p; 70 MHz
V
OUT, dm
= 2 V p-p; 100 MHz
V
OUT, dm
= 2 V p-p; 10 MHz
V
OUT, dm
= 2 V p-p; 70 MHz
V
OUT, dm
= 2 V p-p; 100 MHz
f
1
= 70 MHz; f
2
= 70.1 MHz; V
OUT, dm
= 2 V p-p
f = 100 kHz
f = 100 kHz
G = 4; R
T
= 136 Ω; R
F
= 200 Ω; R
G
= 37 Ω; f = 100 MHz
f = 100 MHz
V
OS, dm
= V
OUT, dm
/2; V
DIN+
= V
DIN−
= 2.5 V
T
MIN
to T
MAX
variation
T
MIN
to T
MAX
variation
Input Offset Current
Input Resistance
Input Capacitance
Input Common-Mode Voltage
CMRR
OUTPUT CHARACTERISTICS
Output Voltage Swing
Linear Output Current
Output Balance Error
−2
Differential
Common mode
−2.5
−50
Min
Typ
1900
200
1700
6000
7
<1
−112
−84
−77
−102
−91
−84
−91
2.2
4
15
−72
±0.5
±1
−30
0.01
+0.5
6
3
1
0.3 to 3.0
−80
+2.5
−10
+2
Max
Unit
MHz
MHz
MHz
V/µs
ns
ns
dBc
dBc
dBc
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
dB
dB
mV
µV/°C
µA
µA/°C
µA
MΩ
MΩ
pF
V
dB
V
mA
dB
Third Harmonic
IMD
Voltage Noise (RTI)
Input Current Noise
Noise Figure
Crosstalk (ADA4937-2)
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
∆V
OUT, dm
/∆V
IN, cm
; ∆V
IN, cm
= ±1 V
Maximum ∆V
OUT
; single-ended output; R
F
= R
G
= 10 kΩ
Per amplifier; R
L, dm
= 20 Ω; f = 10 MHz
∆V
OUT, cm
/∆V
OUT, dm
; ∆V
OUT, dm
= 1 V; f = 10 MHz;
see Figure 50 for test circuit
−69
0.9
4.1
±70
−61
Rev. D | Page 3 of 28
ADA4937-1/ADA4937-2
V
OCM
to ±OUT Performance
Table 2.
Parameter
V
OCM
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Slew Rate
Input Voltage Noise (RTI)
V
OCM
INPUT CHARACTERISTICS
Input Voltage Range
Input Resistance
Input Offset Voltage
Input Bias Current
V
OCM
CMRR
Gain
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Test Conditions/Comments
Min
Typ
440
1150
7.5
1.2
8
V
OS, cm
= V
OUT, cm
; V
DIN+
= V
DIN−
= +V
S
/2
ΔV
OUT, dm
/ΔV
OCM
; ΔV
OCM
= ±1 V
ΔV
OUT, cm
/ΔV
OCM
; ΔV
OCM
= ±1 V
−70
0.97
3.0
38.0
0.02
−70
Data Sheet
Max
Unit
MHz
V/µs
nV/√Hz
V
IN
= 1.5 V to 3.5 V; 25% to 75%
f = 100 kHz
10
2
0.5
−75
0.98
3.8
12
7.1
1.00
5.25
42.0
0.5
V
kΩ
mV
µA
dB
V/V
V
mA
µA/°C
mA
dB
V
V
µs
ns
Power Supply Rejection Ratio
POWER-DOWN (PD)
PD Input Voltage
Turn-Off Time
Turn-On Time
PD Bias Current per Amplifier
Enabled
Powered Down
OPERATING TEMPERATURE RANGE
Enabled
T
MIN
to T
MAX
variation
Powered down
ΔV
OUT, dm
/ΔV
S
; ΔV
S
= 1 V
Powered down
Enabled
39.5
17
0.3
−90
≤1
≥2
1
200
PD = 5 V
PD = 0 V
10
−300
−40
30
−200
50
−150
+105
µA
µA
°C
Rev. D | Page 4 of 28
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