12-Bit, 80 MSPS/105 MSPS ADC
AD9432
FEATURES
On-chip reference and track-and-hold
On-chip input buffer
Power dissipation: 850 mW typical at 105 MSPS
500 MHz analog bandwidth
SNR: 67 dB @ 49 MHz AIN at 105 MSPS
SFDR: 80 dB @ 49 MHz AIN at 105 MSPS
2.0 V p-p analog input range
5.0 V supply operation
3.3 V CMOS/TTL outputs
Twos complement output format
GENERAL INTRODUCTION
The AD9432 is a 12-bit, monolithic sampling analog-to-digital
converter (ADC) with an on-chip track-and-hold circuit and is
optimized for high speed conversion and ease of use. The prod-
uct operates up to a 105 MSPS conversion rate with outstanding
dynamic performance over its full operating range.
The ADC requires only a single 5.0 V power supply and a 105 MHz
encode clock for full performance operation. No external refer-
ence or driver components are required for many applications.
The digital outputs are TTL-/CMOS-compatible, and a separate
output power supply pin supports interfacing with 3.3 V logic.
The encode input supports either differential or single-ended
mode and is TTL-/CMOS-compatible.
Fabricated on an advanced BiCMOS process, the AD9432 is
available in a 52-lead low profile quad flat package (LQFP) and
in a 52-lead thin quad flat package (TQFP_EP). The AD9432 is
specified over the industrial temperature range of −40°C to +85°C.
APPLICATIONS
Communications
Base stations and zero-IF subsystems
Wireless local loop (WLL)
Local multipoint distribution service (LMDS)
HDTV broadcast cameras and film scanners
FUNCTIONAL BLOCK DIAGRAM
V
CC
V
DD
AIN
AIN
ENCODE
ENCODE
BUF
T/H
PIPELINE
ADC
12
OUTPUT
STAGING
12
D11 TO D0
OR
TIMING
REF
00587-001
AD9432
GND
VREFOUT
VREFIN
Figure 1.
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved.
AD9432
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Introduction ....................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Diagram ........................................................................... 5
Absolute Maximum Ratings............................................................ 6
Explanation of Test Levels ........................................................... 6
Thermal Characteristics .............................................................. 6
ESD Caution .................................................................................. 6
Pin Configurations and Function Descriptions ........................... 7
Typical Performance Characteristics ............................................. 8
Terminology .................................................................................... 11
Equivalent Circuits ......................................................................... 12
Theory of Operation ...................................................................... 13
Analog Input ............................................................................... 13
Encode Input ............................................................................... 13
Encode Voltage Level Definition.............................................. 13
Digital Outputs ........................................................................... 14
Voltage Reference ....................................................................... 14
Timing ......................................................................................... 14
Applications Information .............................................................. 15
Using the AD8138 to Drive the AD9432 ................................ 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
6/09—Rev. E to Rev. F
Updated Format .................................................................. Universal
Reorganized Layout ............................................................ Universal
Added TQFP_EP Package ................................................. Universal
Deleted LQFP_ED Package ............................................... Universal
Changes to Thermal Characteristics Section ................................ 6
Changes to Pin Configurations and Function Descriptions
Section ................................................................................................ 7
Changes to Terminology Section.................................................. 11
Deleted Evaluation Board Section ................................................ 15
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 16
1/02—Rev. D to Rev. E
Edits to Specifications .......................................................................3
Edits to Absolute Maximum Ratings ..............................................4
Edits to Ordering Guide ...................................................................4
Addition of Text to Using the AD9432 Section .......................... 10
Edits to Figure 17a .......................................................................... 15
Edits to Figure 17b ......................................................................... 16
Addition of SQ-52 Package Outline............................................. 18
Rev. F | Page 2 of 16
AD9432
SPECIFICATIONS
V
DD
= 3.3 V, V
CC
= 5.0 V; external reference; differential encode input, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
DC ACCURACY
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
No Missing Codes
Gain Error
1
Gain Tempco
1
ANALOG INPUTS (AIN, AIN)
Input Voltage Range
Common-Mode Voltage
Input Offset Voltage
Input Resistance
Input Capacitance
Analog Bandwidth, Full Power
ANALOG REFERENCE
Output Voltage
Tempco
Input Bias Current
SWITCHING PERFORMANCE
Maximum Conversion Rate
Minimum Conversion Rate
Encode Pulse Width High (t
EH
)
Encode Pulse Width Low (t
EL
)
Aperture Delay (t
A
)
Aperture Uncertainty (Jitter)
Output Valid Time (t
V
)
2
Output Propagation Delay (t
PD
)
2
Output Rise Time (t
R
)
2
Output Fall Time (t
F
)
2
Out-of-Range Recovery Time
Transient Response Time
Latency
DIGITAL INPUTS
Encode Input Common Mode
Differential Input
(ENCODE, ENCODE)
Single-Ended Input
Logic 1 Voltage
Logic 0 Voltage
Input Resistance
Input Capacitance
DIGITAL OUTPUTS
Logic 1 Voltage (V
DD
= 3.3 V)
Logic 0 Voltage (V
DD
= 3.3 V)
Output Coding
Temp
Test
Level
Min
80 MSPS
Typ
12
±0.25
±0.5
±0.5
±1.0
Guaranteed
+2
150
2
3.0
±0
3
4
500
2.5
50
15
Max
Min
105 MSPS
Typ
Max
12
±0.25
±0.5
±0.5
±1.0
Guaranteed
+2
150
2
3.0
±0
3
4
500
2.5
50
15
+0.75
+1.0
+1.0
+1.5
+7
Unit
Bits
LSB
LSB
LSB
LSB
% FS
ppm/°C
V p-p
V
mV
kΩ
pF
MHz
V
ppm/°C
μΑ
MSPS
MSPS
ns
ns
ns
ps rms
ns
ns
ns
ns
ns
ns
Cycles
V
mV
25°C
Full
25°C
Full
Full
25°C
Full
Full
Full
Full
Full
25°C
25°C
Full
Full
Full
Full
Full
25°C
25°C
25°C
25°C
Full
Full
Full
Full
25°C
25°C
Full
Full
Full
I
VI
I
VI
VI
I
V
V
V
VI
VI
V
V
VI
V
VI
VI
IV
IV
IV
V
V
VI
VI
V
V
V
V
IV
V
V
−0.75
−1.0
−1.0
−1.5
−5
+0.75
+1.0
+1.0
+1.5
+7
−0.75
−1.0
−1.0
−1.5
−5
−5
2
+5
4
−5
2
+5
4
2.4
2.6
50
2.4
2.6
50
80
1
4.0
4.0
6.2
6.2
2.0
0.25
5.3
5.5
2.1
1.9
2
2
10
1.6
750
105
1
4.0
4.0
4.8
4.8
2.0
0.25
5.3
5.5
2.1
1.9
2
2
10
1.6
750
3.0
3.0
8.0
8.0
Full
Full
Full
25°C
Full
Full
IV
IV
VI
V
VI
VI
2.0
3
5
4.5
0.8
8
2.0
3
5
4.5
0.8
8
V
V
kΩ
pF
V
V
V
DD
− 0.05
0.05
Twos complement
Rev. F | Page 3 of 16
V
DD
− 0.05
0.05
Twos complement
AD9432
Parameter
POWER SUPPLY
Power Dissipation
3
I
VCC
I
VDD
Power Supply Rejection Ratio
(PSRR)
DYNAMIC PERFORMANCE
4
Signal-to-Noise Ratio (SNR)
(Without Harmonics)
f
IN
= 10 MHz
f
IN
= 40 MHz
f
IN
= 49 MHz
f
IN
= 70 MHz
Signal-to-Noise and Distortion
(SINAD) Ratio (with Harmonics)
f
IN
= 10 MHz
f
IN
= 40 MHz
f
IN
= 49 MHz
f
IN
= 70 MHz
Effective Number of Bits (ENOB)
f
IN
= 10 MHz
f
IN
= 40 MHz
f
IN
= 49 MHz
f
IN
= 70 MHz
Second-Order and Third-Order
Harmonic Distortion
f
IN
= 10 MHz
f
IN
= 40 MHz
f
IN
= 49 MHz
f
IN
= 70 MHz
Worst Other Harmonic or Spur
(Excluding Second-Order and
Third-Order Harmonics)
f
IN
= 10 MHz
f
IN
= 40 MHz
f
IN
= 49 MHz
f
IN
= 70 MHz
Two-Tone Intermodulation
Distortion (IMD)
f
IN1
= 29.3 MHz; f
IN2
= 30.3 MHz
f
IN1
= 70.3 MHz; f
IN2
= 71.3 MHz
1
2
Temp
Full
Full
Full
25°C
Test
Level
VI
VI
VI
I
Min
80 MSPS
Typ
790
158
9.5
+0.5
Max
1000
200
12.2
+5
Min
105 MSPS
Typ
Max
850
170
12.5
+0.5
1100
220
16
+5
Unit
mW
mA
mA
mV/V
−5
−5
25°C
25°C
25°C
25°C
I
I
I
V
65.5
65
67.5
67.2
67.0
66.1
65.5
64
67.5
67.2
67.0
66.1
dB
dB
dB
dB
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
I
I
I
V
V
V
V
V
65
64.5
67.2
66.9
66.7
65.8
11.0
10.9
10.9
10.7
65
63
67.2
66.9
66.7
65.8
11.0
10.9
10.9
10.7
dB
dB
dB
dB
Bits
Bits
Bits
Bits
25°C
25°C
25°C
25°C
I
I
I
V
−75
−73
−85
−85
−83
−80
−75
−72
−85
−83
−80
−78
dBc
dBc
dBc
dBc
25°C
25°C
25°C
25°C
I
I
I
V
−80
−80
−90
−90
−90
−90
−80
−80
−90
−90
−90
−90
dBc
dBc
dBc
dBc
25°C
25°C
V
V
−75
−66
−75
−66
dBc
dBc
Gain error and gain temperature coefficients are based on the ADC only (with a fixed 2.5 V external reference and a 2 V p-p differential analog input).
t
V
and t
PD
are measured from the transition points of the ENCODE input to the 50%/50% levels of the digital output swing. The digital output load during testing is not
to exceed an ac load of 10 pF or a dc current of ±40 μA. Rise and fall times are measured from 10% to 90%.
3
Power dissipation measured with encode at rated speed and a dc analog input (outputs static, I
VDD
= 0).
4
SNR/harmonics based on an analog input voltage of –0.5 dBFS referenced to a 2 V full-scale input range.
Rev. F | Page 4 of 16
AD9432
TIMING DIAGRAM
SAMPLE N – 1
AIN
SAMPLE N
SAMPLE N + 10
SAMPLE N + 11
t
A
t
EH
ENCODE
ENCODE
SAMPLE N + 1
t
EL
SAMPLE N + 9
1/
f
S
t
PD
D11 TO D0
DATA N – 11
DATA N – 10
DATA
N–9
DATA
N–2
DATA N – 1
DATA N
t
V
DATA N + 1
00587-003
Figure 2. Timing Diagram
Rev. F | Page 5 of 16
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