Data Sheet
FEATURES
PLL generated or direct master clock
Low EMI design
112 dB DAC/107 dB ADC dynamic range and SNR
−94 dB THD + N
Single 3.3 V supply
Tolerance for 5 V logic inputs
Supports 24-bits and 8 kHz to 192 kHz sample rates
Differential ADC input
Differential DAC output
Log volume control with autoramp function
SPI controllable for flexibility
Software-controllable clickless mute
Software power-down
Right-justified, left-justified, I
2
S, and TDM modes
Master and slave modes up to 16-channel input/output
64-lead LQFP package
Qualified for automotive applications
4 ADC/8 DAC with PLL,
192 kHz, 24-Bit Codec
AD1939
GENERAL DESCRIPTION
The
AD1939
is a high performance, single-chip codec that
provides four analog-to-digital converters (ADCs) with
differential input, and eight digital-to-analog converters (DACs)
with differential output using the Analog Devices, Inc. patented
multibit sigma-delta (Σ-Δ) architecture. An SPI port is included,
allowing a microcontroller to adjust volume and many other
parameters. The
AD1939
operates from 3.3 V digital and analog
supplies. The
AD1939
is available in a 64-lead (differential
output) LQFP package.
The
AD1939
is designed for low EMI. This consideration is
apparent in both the system and circuit design architectures.
By using the on-board PLL to derive the master clock from the
LR clock or from an external crystal, the
AD1939
eliminates
the need for a separate high frequency master clock and can
also be used with a suppressed bit clock. The DACs and ADCs
are designed using the latest Analog Devices continuous time
architectures to further minimize EMI. By using 3.3 V supplies,
power consumption is minimized, further reducing emissions.
APPLICATIONS
Automotive audio systems
Home Theater Systems
Set-top boxes
Digital audio effects processors
FUNCTIONAL BLOCK DIAGRAM
DIGITAL AUDIO
INPUT/OUTPUT
AD1939
SERIAL DATA PORT
DAC
DAC
ADC
ANALOG
AUDIO
INPUTS
ADC
ADC
ADC
DIGITAL
FILTER
SDATA
OUT
SDATA
IN
CLOCKS
TIMING MANAGEMENT
AND CONTROL
(CLOCK AND PLL)
DIGITAL
FILTER
AND
VOLUME
CONTROL
DAC
DAC
DAC
DAC
DAC
DAC
PRECISION
VOLTAGE
REFERENCE
SPI
CONTROL PORT
ANALOG
AUDIO
OUTPUTS
CONTROL DATA
INPUT/OUTPUT
Figure 1.
Rev. E
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Tel: 781.329.4700 ©2006–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
06071-001
AD1939
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Test Conditions ............................................................................. 3
Analog Performance Specifications ........................................... 3
Crystal Oscillator Specifications................................................. 4
Digital Input/Output Specifications........................................... 5
Power Supply Specifications........................................................ 5
Digital Filters ................................................................................. 6
Timing Specifications .................................................................. 6
Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution .................................................................................. 8
Pin Configuration and Function Descriptions ............................. 9
Typical Performance Characteristics ........................................... 11
Theory of Operation ...................................................................... 13
Data Sheet
Analog-to-Digital Converters (ADCs) .................................... 13
Digital-to-Analog Converters (DACs) .................................... 13
Clock Signals ............................................................................... 13
Reset and Power-Down ............................................................. 14
Serial Control Port ..................................................................... 14
Power Supply and Voltage Reference....................................... 15
Serial Data Ports—Data Format ............................................... 15
Time-Division Multiplexed (TDM) Modes ............................ 15
Daisy-Chain Mode ..................................................................... 19
Control Registers ............................................................................ 24
Definitions ................................................................................... 24
PLL and Clock Control Registers ............................................. 24
DAC Control Registers .............................................................. 25
ADC Control Registers .............................................................. 27
Additional Modes ....................................................................... 29
Application Circuits ....................................................................... 30
Outline Dimensions ....................................................................... 31
Ordering Guide .......................................................................... 31
Automotive Products ................................................................. 31
REVISION HISTORY
2/13—Rev. D to Rev. E
Change to t
CLH
Parameter, Table 7 ................................................... 7
Changes to Serial Control Port Section ........................................14
7/11—Rev. C to Rev. D
Changes to Pin 15, Pin 18, Pin 19, and Pin 20 Descriptions ...... 9
Changes to Pin 26 and Pin 27 Descriptions ................................ 10
9/10—Rev. B to Rev. C
Added Qualified for Automotive Applications to the Features
Section ................................................................................................ 1
Changed Case Temperature from 130°C to 125°C ...................... 4
Changed T
A
from −40°C to +130°C to −40°C to +105°C ........... 5
Changed T
A
from −40°C to +130°C to −40°C to +105°C ........... 7
Changes to Ordering Guide .......................................................... 31
Added Automotive Products Section .......................................... 31
3/10—Rev. A to Rev. B
Changes to Ordering Guide .......................................................... 31
6/07—Rev. 0 to Rev. A
Deleted I
2
C References....................................................... Universal
Change to Figure 1 ............................................................................1
Changes to Figure 2 ...........................................................................9
Changes to Table 10 ..........................................................................9
Changes to Table 11 ....................................................................... 14
Changes to Table 12 ....................................................................... 16
Changes to Figure 24 and Figure 25............................................. 22
Changes to Table 13 ....................................................................... 23
Change to Figure 26 ....................................................................... 23
Changes to Table 15 and Table 16 ................................................ 24
Changes to Figure 27 and Figure 28............................................. 29
Change to Figure 30 ....................................................................... 30
Updated Outline Dimensions ....................................................... 31
Changes to Ordering Guide .......................................................... 31
7/06—Revision 0: Initial Version
Rev. E | Page 2 of 32
Data Sheet
SPECIFICATIONS
TEST CONDITIONS
AD1939
Performance of all channels is identical, exclusive of the interchannel gain mismatch and interchannel phase deviation specifications.
Supply voltages (AVDD, DVDD)
Temperature range
1
Master clock
Input sample rate
Measurement bandwidth
Word width
Load capacitance (digital output)
Load current (digital output)
Input voltage high
Input voltage low
1
3.3 V
As specified in Table 1 and Table 2
12.288 MHz (48 kHz f
S
, 256 × f
S
mode)
48 kHz
20 Hz to 20 kHz
24 bits
20 pF
±1 mA or 1.5 kΩ to ½ DVDD supply
2.0 V
0.8 V
Functionally guaranteed at −40°C to +125°C case temperature.
ANALOG PERFORMANCE SPECIFICATIONS
Specifications guaranteed at an ambient temperature of 25°C.
Table 1.
Parameter
ANALOG-TO-DIGITAL CONVERTERS
ADC Resolution
Dynamic Range
No Filter (RMS)
With A-Weighted Filter (RMS)
Total Harmonic Distortion + Noise
Full-Scale Input Voltage (Differential)
Gain Error
Interchannel Gain Mismatch
Offset Error
Gain Drift
Interchannel Isolation
CMRR
Input Resistance
Input Capacitance
Input Common-Mode Bias Voltage
DIGITAL-TO-ANALOG CONVERTERS
Dynamic Range
No Filter (RMS)
With A-Weighted Filter (RMS)
With A-Weighted Filter (Average)
Total Harmonic Distortion + Noise
Conditions/Comments
All ADCs
20 Hz to 20 kHz, −60 dB input
96
98
−1 dBFS
−10
−0.25
−10
Min
Typ
24
102
105
−96
1.9
Max
Unit
Bits
dB
dB
dB
V rms
%
dB
mV
ppm/°C
dB
dB
dB
kΩ
pF
V
−87
+10
+0.25
+10
100 mV rms, 1 kHz
100 mV rms, 20 kHz
0
100
−110
55
55
14
10
1.5
20 Hz to 20 kHz, −60 dB input
102
105
0 dBFS
Two channels running
Eight channels running
−10
−0.2
−25
−30
107
110
112
−94
−86
1.76 (4.96)
dB
dB
dB
dB
dB
V rms (V p-p)
%
dB
mV
ppm/°C
dB
−76
+10
+0.2
+25
+30
Full-Scale Output Voltage
Gain Error
Interchannel Gain Mismatch
Offset Error
Gain Drift
Interchannel Isolation
Rev. E | Page 3 of 32
−6
100
AD1939
Parameter
Interchannel Phase Deviation
Volume Control Step
Volume Control Range
De-emphasis Gain Error
Output Resistance at Each Pin
REFERENCE
Internal Reference Voltage
External Reference Voltage
Common-Mode Reference Output
REGULATOR
Input Supply Voltage
Regulated Output Voltage
Conditions/Comments
Min
Typ
0
0.375
95
100
FILTR pin
FILTR pin
CM pin
VSUPPLY pin
VSENSE pin
1.50
1.50
1.50
5
3.37
Max
Data Sheet
Unit
Degrees
dB
dB
dB
Ω
V
V
V
V
V
±0.6
1.32
1.68
4.5
3.19
5.5
3.55
Specifications measured at a case temperature of 125°C.
Table 2.
Parameter
ANALOG-TO-DIGITAL CONVERTERS
ADC Resolution
Dynamic Range
No Filter (RMS)
With A-Weighted Filter (RMS)
Total Harmonic Distortion + Noise
Full-Scale Input Voltage (Differential)
Gain Error
Interchannel Gain Mismatch
Offset Error
DIGITAL-TO-ANALOG CONVERTERS
Dynamic Range
No Filter (RMS)
With A-Weighted Filter (RMS)
With A-Weighted Filter (Average)
Total Harmonic Distortion + Noise
Conditions/Comments
All ADCs
20 Hz to 20 kHz, −60 dB input
93
96
−1 dBFS
−10
−0.25
−10
20 Hz to 20 kHz, −60 dB input
101
104
0 dBFS
Two channels running
Eight channels running
−10
−0.2
−25
−30
FILTR pin
FILTR pin
CM pin
VSUPPLY pin
VSENSE pin
107
110
112
−94
−86
1.76 (4.96)
dB
dB
dB
dB
dB
V rms (V p-p)
%
dB
mV
ppm/°C
V
V
V
V
V
Min
Typ
24
102
104
−96
1.9
Max
Unit
Bits
dB
dB
dB
V rms
%
dB
mV
−87
+10
+0.25
+10
0
−70
+10
+0.2
+25
+30
Full-Scale Output Voltage
Gain Error
Interchannel Gain Mismatch
Offset Error
Gain Drift
REFERENCE
Internal Reference Voltage
External Reference Voltage
Common-Mode Reference Output
REGULATOR
Input Supply Voltage
Regulated Output Voltage
−6
1.32
1.50
1.50
1.50
5
3.43
1.68
4.5
3.2
5.5
3.65
CRYSTAL OSCILLATOR SPECIFICATIONS
Table 3.
Parameter
Transconductance
Min
Typ
3.5
Rev. E | Page 4 of 32
Max
Unit
mmhos
Data Sheet
DIGITAL INPUT/OUTPUT SPECIFICATIONS
−40°C < T
A
< +105°C, DVDD = 3.3 V ± 10%.
Table 4.
Parameter
High Level Input Voltage (V
IH
)
Low Level Input Voltage (V
IL
)
Input Leakage
High Level Output Voltage (V
OH
)
Low Level Output Voltage (V
OL
)
Input Capacitance
Conditions/Comments
MCLKI/XI pin
I
IH
@ V
IH
= 2.4 V
I
IL
@ V
IL
= 0.8 V
I
OH
= 1 mA
I
OL
= 1 mA
Min
2.0
2.2
Typ
Max
AD1939
0.8
10
10
DVDD − 0.60
0.4
5
Unit
V
V
V
µA
µA
V
V
pF
POWER SUPPLY SPECIFICATIONS
Table 5.
Parameter
SUPPLIES
Voltage
Conditions/Comments
DVDD
AVDD
VSUPPLY
Master clock = 256 f
S
f
S
= 48 kHz
f
S
= 96 kHz
f
S
= 192 kHz
f
S
= 48 kHz to 192 kHz
Min
3.0
3.0
4.5
Typ
3.3
3.3
5.0
56
65
95
2.0
74
23
Master clock = 256 f
S
, 48 kHz
429
185
244
83
1 kHz, 200 mV p-p
20 kHz, 200 mV p-p
50
50
mW
mW
mW
mW
dB
dB
Max
3.6
3.6
5.5
Unit
V
V
V
mA
mA
mA
mA
mA
mA
Digital Current
Normal Operation
Power-Down
Analog Current
Normal Operation
Power-Down
DISSIPATION
Operation
All Supplies
Digital Supply
Analog Supply
Power-Down, All Supplies
POWER SUPPLY REJECTION RATIO
Signal at Analog Supply Pins
Rev. E | Page 5 of 32
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