SiT5348
PRELIMINARY
1 MHz to 60 MHz, ±50 ppb, Endura™ Series Ultra-precision Super-TCXO
Description
The
SiT5348
is a ruggedized ±50 ppb precision MEMS
Features
Super-TCXO with a maximum acceleration sensitivity of
0.009 ppb/g or 0.1 ppb/g. Engineered for best dynamic
performance, the SiT5348 is ideal for high reliability
defense, space, avionics, guidance, precision GNSS and
communications applications.
Leveraging SiTime’s unique DualMEMS™ temperature
sensing and TurboCompensation™ technologies, the
SiT5348 delivers the best dynamic performance for timing
stability in the presence of environmental stressors due to
air flow, temperature perturbation, vibration, shock, and
electromagnetic interference. This device also integrates
multiple on-chip regulators to filter power supply noise,
eliminating the need for a dedicated external LDO.
The SiT5348 offers three device configurations that can be
ordered using
Ordering Codes
for:
1) TCXO with non-pullable output frequency,
2) VCTCXO allowing voltage control of output
frequency, and
3) DCTCXO, enabling digital control of output frequency
using an I
2
C interface, pullable to 5 ppt (parts per
trillion) resolution.
The SiT5348 can be factory programmed for any
combination of frequency, stability, voltage, and pull range.
Programmability enables designers to optimize clock
configurations while eliminating long lead times and
customization costs associated with quartz devices where
each frequency is custom built.
Refer to
Manufacturing Guideline
for proper reflow profile
and PCB cleaning recommendations for best performance.
Any frequency from 1 MHz to 60 MHz in 1 Hz steps
Factory programmable options for low lead time
Best dynamic stability under airflow, thermal shock
0.009 ppb/g or 0.1 ppb/g acceleration sensitivity
±50 ppb stability across temperature
±1.3 ppb/C max frequency slope (ΔF/ΔT)
3e-11 ADEV at 10 second averaging time
0°C to +70°C operating temperature
No activity dips or micro jumps
Resistant to shock, vibration and board bending
On-chip regulators eliminate the need for external LDOs
Digital frequency pulling (DCTCXO) via I
2
C
Digital control of output frequency and pull range
Up to
±3200
ppm pull range
Frequency pull resolution down to 5 ppt
2.5V, 2.8V, 3.0V and 3.3V supply voltage
LVCMOS or clipped sinewave output
RoHS and REACH compliant
Pb-free, Halogen-free, Antimony-free
Applications
Ballistics, missiles, munitions
Military portable radios
Ruggedized communications networks
Precision GNSS systems
SATCOM
Transponders
Military, defense, space, avionics systems
Block Diagram
5.0 x 3.2 mm
2
Package Pinout
SDA / NC
OE / VC / NC
SCL / NC
NC
GND
1
10
9
VDD
NC
NC
CLK
2
3
8
7
4
5
6
A0 / NC
Figure 1. SiT5348 Block Diagram
Figure 2. Pin Assignments (Top view)
(Refer to
Table 11
for Pin Descriptions)
Rev 0.5
July 22, 2019
www.sitime.com
SiT5348
1 MHz to 60 MHz, ±50 ppb, Endura™ Series Ultra-precision Super-TCXO
Ordering Information
PRELIMINARY
The following part number guide is for reference only. To customize and build an exact part number, use the
SiTime
Part Number Generator.
To validate the part number, use the SiTime
Part Number Decoder.
Part
Family
Silicon
Revision
Letter
Package Size
"F": 5.0 x 3.2 mm
2
Pin 1 Function
–
TCXO mode only
"E": Output Enable
"N": No Connect
TCXO
VCTCXO
DCTCXO
Temperature Range
SiT5 3 4 8 A N
-
F R- 33E 0 B 19.123456T
SiT5 3 4 8 A N
-
F R- 33 V T B 19.123456T
SiT5 3 4 8 A N
-
F R G 33J R B 19.123456T
Packaging
"T": 12mm Tape & Reel, 3ku reel
"Y": 12mm Tape & Reel, 1ku reel
“X”: 12mm Tape & Reel, 250u reel
(blank): bulk
[2]
"N": Commercial, 0 to 70
°C
Output Waveform
"-": LVCMOS
[1]
"C": Clipped Sinewave
Frequency
1.000000 to 60.000000 MHz
Frequency Stability
"R": for
±50
ppb
Special Features
"A": Low g-Sensitivity, 0.1 ppb/g
"B": Ultra-low g-Sensitivity, 0.009 ppb/g
I
2
C Address Mode
–
DCTCXO mode only
Values: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F
Set bits 3:0 of device
I
2
C address to the Hex value
of the ordering code. When the
I
2
C address is
factory programmed using these codes, pin
A0 is NC.
Value: G
The
I
2
C address is controlled by A0 pin.
Pull Range
–
DCTCXO mode only
"T":
±6.25
ppm
"R":
±10
ppm
"Q":
±12.5
ppm
"M":
±25
ppm
"B":
±50
ppm
"C":
±80
ppm
"E":
±100
ppm
"F":
±125
ppm
"G":
"H":
"X":
"L":
"Y":
"S":
"Z":
"U":
±150 ppm
±200 ppm
±400 ppm
±600 ppm
±800 ppm
±1200 ppm
±1600 ppm
±3200 ppm
Supply Voltage
"25": 2.5 V
±
10%
"28": 2.8 V
±
10%
"30": 3.0 V
±
10%
"33": 3.3 V
±
10%
Pin 1 Function
–
DCTCXO mode only
"I": Output Enable
"J": No Connect, software OE control
Notes:
1. “-“ corresponds to the default rise/fall time for LVCMOS output as specified in
Table 1
(Electrical Characteristics).
Contact SiTime
for other rise/fall time options
for best EMI.
2. Bulk is available for sampling only
Rev 0.5
Page 2 of 37
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SiT5348
1 MHz to 60 MHz, ±50 ppb, Endura™ Series Ultra-precision Super-TCXO
TABLE OF CONTENTS
PRELIMINARY
Description ................................................................................................................................................................................... 1
Features....................................................................................................................................................................................... 1
Applications ................................................................................................................................................................................. 1
Block Diagram ............................................................................................................................................................................. 1
5.0 x 3.2 mm
2
Package Pinout ..................................................................................................................................................... 1
Ordering Information .................................................................................................................................................................... 2
Electrical Characteristics.............................................................................................................................................................. 4
Device Configurations and Pin-outs ............................................................................................................................................. 8
Pin-out Top Views................................................................................................................................................................. 8
Test Circuit Diagrams for LVCMOS and Clipped Sinewave Outputs ........................................................................................... 9
Waveforms................................................................................................................................................................................. 11
Timing Diagrams ........................................................................................................................................................................ 12
Typical Performance Plots ......................................................................................................................................................... 13
Architecture Overview ................................................................................................................................................................ 17
Frequency Stability ............................................................................................................................................................. 17
Output Frequency and Format ............................................................................................................................................ 17
Output Frequency Tuning ................................................................................................................................................... 17
Pin 1 Configuration (OE, VC, or NC) .................................................................................................................................. 18
Device Configurations ................................................................................................................................................................ 18
TCXO Configuration ........................................................................................................................................................... 18
VCTCXO Configuration ...................................................................................................................................................... 19
DCTCXO Configuration ...................................................................................................................................................... 20
VCTCXO-Specific Design Considerations ................................................................................................................................. 21
Linearity .............................................................................................................................................................................. 21
Control Voltage Bandwidth ................................................................................................................................................. 21
FV Characteristic Slope K
V
................................................................................................................................................. 21
Pull Range, Absolute Pull Range ........................................................................................................................................ 22
DCTCXO-Specific Design Considerations ................................................................................................................................. 23
Pull Range and Absolute Pull Range .................................................................................................................................. 23
Output Frequency ............................................................................................................................................................... 24
I
2
C Control Registers .......................................................................................................................................................... 26
Register Descriptions.......................................................................................................................................................... 26
Register Address: 0x00. Digital Frequency Control Least Significant Word (LSW) ............................................................ 26
Register Address: 0x01. OE Control, Digital Frequency Control Most Significant Word (MSW) ......................................... 27
Register Address: 0x02. DIGITAL PULL RANGE CONTROL
[14]
........................................................................................ 28
Serial Interface Configuration Description .......................................................................................................................... 29
Serial Signal Format ........................................................................................................................................................... 29
Parallel Signal Format ........................................................................................................................................................ 30
Parallel Data Format ........................................................................................................................................................... 30
I
2
C Timing Specification ...................................................................................................................................................... 32
I
2
C Device Address Modes ................................................................................................................................................. 33
Schematic Example ............................................................................................................................................................ 34
Dimensions and Patterns ........................................................................................................................................................... 35
Layout Guidelines ...................................................................................................................................................................... 36
Manufacturing Guidelines .......................................................................................................................................................... 36
Rev 0.5
Page 3 of 37
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SiT5348
1 MHz to 60 MHz, ±50 ppb, Endura™ Series Ultra-precision Super-TCXO
Electrical Characteristics
PRELIMINARY
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and 3.3V Vdd.
Table 1. Output Characteristics
Parameters
Nominal Output Frequency Range
Operating Temperature Range
Output Voltage Level
Rise/Fall Time
Acceleration (g) sensitivity, Gamma
Vector
Symbol
F_nom
T_use
V_out
Tr, Tf
F_g
Min.
1
0
0.8
–
Typ.
–
–
–
3.5
Max.
60
+70
1.2
4.6
Unit
MHz
°C
V
ns
Commercial, ambient temperature
Clipped sinewave output, 10kΩ || 10 pF ±10%
20% - 80% Vdd, F_nom = 19.2 MHz
Ultra-low sensitivity grade; total gamma over 3 axes; 15 Hz
to 2 kHz; MIL-PRF-55310, computed per section 4.8.18.3.1
Low sensitivity grade; total gamma over 3 axes; 15 Hz to
2 kHz; MIL-PRF-55310, computed per section 4.8.18.3.1
Referenced to (max frequency + min frequency)/2 over the
rated temperature range. Vc=Vdd/2 for VCTCXO
Initial frequency at 25°C inclusive of solder-down shift
at 48 hours after 2 reflows
Vdd ±5%
LVCMOS output, 15 pF ±10%. Clipped sinewave output,
10kΩ || 10 pF ±10%
0.5°C/min temperature ramp rate
0.5°C/min temperature ramp rate, 0 to 70 ºC
Inclusive of over-temperature frequency variation
0 to 70 °C, 0.5°C/min ramp rate
At 25°C, after 30-days of continued operation. Aging is
measured with respect to day 31.
At 25°C, after 2-days of continued operation. Aging is
measured with respect to day 3.
Condition
Frequency Coverage
Temperature Range
Clipped Sinewave Output Characteristics
Rugged Characteristics
–
–
0.004
–
0.009
0.1
ppb/g
ppb/g
Frequency Stability
Frequency Stability over
Temperature
Initial Tolerance
Supply Voltage Sensitivity
Output Load Sensitivity
Frequency vs. Temperature Slope
Dynamic Frequency Change during
Temperature Ramp
24-hour holdover stability
Hysteresis Over Temperature
One-Day Aging
One-Year Aging
20-Year Aging
Duty Cycle
Rise/Fall Time
Output Voltage High
Output Voltage Low
Output Impedance
Start-up Time
F_stab
F_init
F_Vdd
F_load
ΔF/ΔT
F_dynamic
F_24_Hold
F_hys
F_1d
F_1y
F_20y
DC
Tr, Tf
VOH
VOL
Z_out_c
T_start
-50
-0.5
-0.9
-0.14
-1.3
-0.01
-0.15
–
–
–
–
45
0.8
90%
–
–
–
–
–
±0.2
±0.03
±0.5
±0.004
–
±3.8
±1
±0.3
±0.5
–
1.2
–
–
20
2.5
+50
+0.5
+0.9
+0.14
+1.3
+0.01
+0.15
+13
–
–
–
55
1.9
–
10%
–
3.5
ppb
ppm
ppb
ppb
ppb/°C
ppb/s
ppm
ppb
ppb
ppm
ppm
%
ns
Vdd
Vdd
Ohms
ms
10% - 90% Vdd
IOH = +3mA
IOL = -3mA
Impedance looking into output buffer
Time to first pulse, measured from the time Vdd reaches
90% of its final value. Vdd ramp time = 100 µs from 0V to
Vdd
F_nom = 10 MHz. See
Timing Diagrams
section below.
Time to first accurate pulse within rated stability, measured
from the time Vdd reaches 90% of its final value. Vdd
ramp time = 100 µs
LVCMOS Output Characteristics
Start-up Characteristics
Output Enable Time
First Pulse Accuracy
T_oe
T_stability
–
–
–
5
680
45
ns
ms
Rev 0.5
Page 4 of 37
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SiT5348
1 MHz to 60 MHz, ±50 ppb, Endura™ Series Ultra-precision Super-TCXO
Table 2. DC Characteristics
Parameters
Supply Voltage
Symbol
Vdd
Min.
2.25
2.52
2.7
2.97
Current Consumption
OE Disable Current
Idd
I_od
–
–
–
–
Typ.
2.5
2.8
3.0
3.3
44
48
43
47
Max.
2.75
3.08
3.3
3.63
53
57
51
55
Unit
V
V
V
V
mA
mA
mA
mA
PRELIMINARY
Condition
Contact
SiTime
for 2.25V to 3.63V continuous supply
voltage support.
Supply Voltage
Current Consumption
F_nom = 19.2 MHz, No Load, TCXO and DCTCXO modes
F_nom = 19.2 MHz, No Load, VCTCXO mode
OE = GND, output weakly pulled down. TCXO, DCTCXO
OE = GND, output weakly pulled down. VCTCXO mode
Table 3. Input Characteristics
Parameters
Input Impedance
Input High Voltage
Input Low Voltage
Symbol
Z_in
VIH
VIL
Min.
75
70%
–
±6.25
±6.25
±10
±12.5
±25
±50
±80
±100
±125
±150
±200
±400
±600
±800
±1200
±1600
±3200
±5.2
90%
–
8
–
Typ.
–
–
–
–
Max.
–
–
30%
–
Unit
kΩ
Vdd
Vdd
ppm
VCTCXO mode. Contact
SiTime
for ±12.5 and ±25 ppm.
Internal pull up to Vdd
Condition
Input Characteristics
–
OE Pin
Frequency Tuning Range – Voltage Control or I
2
C mode
Pull Range
PR
–
–
ppm
DCTCXO mode
Absolute Pull Range
[3]
Upper Control Voltage
Lower Control Voltage
Control Voltage Input Impedance
Control Voltage Input Bandwidth
Frequency Control Polarity
Pull Range Linearity
Bus Frequency
Input Voltage Low
Input Voltage High
Output Voltage Low
Input Leakage current
Input Capacitance
APR
VC_U
VC_L
VC_z
VC_bw
F_pol
PR_lin
2
–
–
–
–
10
Positive
–
–
10%
–
–
ppm
Vdd
Vdd
MΩ
kHz
DCTCXO, VCTCXO for PR = ±6.25 ppm
VCTCXO mode
VCTCXO mode
VCTCXO mode
VCTCXO mode. Contact
SiTime
for other bandwidth
options.
VCTCXO mode
VCTCXO mode
0 to 70
°C
DCTCXO mode
DCTCXO mode
DCTCXO mode
0.1 V
DD
< VOUT < 0.9 V
DD.
Includes typical leakage current
from 200 kΩ pull resister to VDD. DCTCXO mode
DCTCXO mode
–
0.5
≤ 1000
1.0
%
kHz
I C Interface Characteristics, 200 Ohm, 550 pF (Max I
2
C Bus Load)
F_I2C
VIL_I2C
VIH_I2C
VOL_I2C
I
L
C
IN
–
70%
–
0.5
–
–
–
–
–
–
30%
–
0.4
24
5
Vdd
Vdd
V
µA
pF
Note:
3. APR = PR – initial tolerance – 20-year aging – frequency stability over temperature. Refer to
Table 15
for APR with respect to other pull range options.
Rev 0.5
Page 5 of 37
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