QL24x32B
pASIC
®
1 Family
Very-High-Speed CMOS FPGA
pASIC
HIGHLIGHTS
Very High Speed
– ViaLink
®
metal-to-metal programmable–via
antifuse technology, allows counter speeds over 150 MHz and logic
cell delays of under 2 ns.
High Usable Density
– An 24-by-32 array of 768 logic cells
provides 8,000 usable ASIC gates (14,000 PLD gates) in 144-pin
TQFP, 208-pin PQFP and 208-pin CQFP packages.
PCI-Output Drive
– Fully PCI 2.1 compliant input/output
capability. (including drive current)
Low-Cost, Easy-to-Use Design Tools
– Designs entered and
simulated using QuickLogic's new QuickWorks
®
development
environment, or with third-party CAE tools including Viewlogic,
Synopsys, Mentor, Cadence and Veribest. Fast, fully automatic place
and route on PC and workstation platforms using QuickLogic
software.
…8,000
usable ASIC gates,
180 I/O pins
4
pASIC 1
QL24x32B
Block Diagram
768 Logic Cells
= Up to 172 prog. I/O cells, 6 Input high-drive cells, 2 Input/Clk (high-drive) cells
4-31
QL24x32B
PRODUCT
SUMMARY
The QL24x32B is a member of the pASIC 1 Family of very-high-speed
CMOS user-programmable ASIC devices. The 768 logic cell field-
programmable gate array (FPGA) offers 8,000 usable ASIC gates
(equivalent to 14,000 PLD gates) of high-performance general-purpose
logic in 144-pin TQFP and 208-pin PQFP and CQFP packages.
Low-impedance, metal-to-metal, ViaLink interconnect technology
provides nonvolatile custom logic capable of operating above 150 MHz.
Logic cell delays under 2 ns, combined with input delays of under 1.5 ns
and output delays under 3 ns, permit high-density programmable devices
to be used with today’s fastest microprocessors and DSPs.
Designs can be entered using QuickLogic’s QuickWorks Toolkit or most
populart third-party CAE tools. QuickWorks combines Verilog/VHDL
design entry and simulation tools with device-specific place & route and
programming software. Ample on-chip routing channels allow fast, fully
automatic place and route of designs using up to 100% of the logic and
I/O cells, while maintaining fixed pin-outs
FEATURES
Total of 180 I/O pins
– 172 Bidirectional Input/Output pins
– 6 Dedicated Input/High-Drive pins
– 2 Clock/Dedicated input pins with fanout-independent, low-skew
clock networks
– PCI 2.1 Compliant I/Os
Input + logic cell + output delays under 6 ns
Chip-to-chip operating frequencies up to 110 MHz
Internal state machine frequencies up to 150 MHz
Clock skew < 0.5 ns
Input hysteresis provides high noise immunity
Built-in scan path permits 100% factory testing of logic and I/O cells
and functional testing with Automatic Test Vector Generation
(ATVG) software after programming
144-pin TQFP compatible with QL16x24B
0.65µ CMOS process with ViaLink programming technology
4-32
QL24x32B
Pinout
Diagram
144-pin TQFP
4
pASIC 1
4-33
QL24x32B
Pinout Diagram
208-pin PQFP/CQFP
PIN # 1
PIN # 157
pASIC
QL24X32B-1PQ208C
PIN # 105
PIN # 53
4-34
QL24x32B
PQFP/CQFP 208 Function/Connector Table
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
FUN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/Sck
I/Clk
PIN
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
FUN
VCC
I/P
I
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PIN
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
FUN
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
GND
PIN
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
FUN
I/O
I/O
I/O
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PIN
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
FUN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/SI
I/Clk
PIN
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
FUN
VCC
I
I/SO
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PIN
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
FUN
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
GND
PIN
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
FUN
I/O
I/O
I/O
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
4
pASIC 1
4-35
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EEWORLD
