FET BIAS CONTROLLER WITH POLARISATION
SWITCH AND TONE DETECTION
ISSUE 2 - JUNE 2006
DEVICE DESCRIPTION
The ZNBG series of devices are designed to meet the
bias requirements of GaAs and HEMT FETs
commonly used in satellite receiver LNBs, PMR,
cellular telephones etc. with a minimum of external
components.
With the addition of two capacitors and a resistor the
devices provide drain voltage and current control for
three external grounded source FETs, generating
the regulated negative rail required for FET gate
biasing whilst operating from a single supply. This
negative bias, at -2.8 volts, can also be used to
supply other external circuits.
The ZNBG3115/16 includes bias circuits to drive up
to three external FETs. A control input to the device
selects either one of two FETs as operational, the
third FET is permanently active. This feature is
normally used as an LNB polarisation switch. Also
specific to Universal LNB applications is the 22kHz
tone detection and logic output feature which is
used to enable high and low band frequency
switching.
The ZNBG3115/16 has been designed to cope with
DiSEqC™ ready set top boxes and rejects all
transients from channel switching.
ZNBG3115
ZNBG3116
Drain current setting of the ZNBG3115/16 is user
selectable over the range 0 to 15mA, this is achieved
with addition of a single resistor. The series also offers
the choice of drain voltage to be set for the FETs, the
3115 gives 2.2 volts drain whilst the 3116 gives 2 volts.
These devices are unconditionally stable over the full
working temperature with the FETs in place, subject to
the inclusion of the recommended gate and drain
capacitors. These ensure RF stability and minimal
injected noise.
It is possible to use less than the devices full
complement of FET bias controls, unused drain and gate
connections can be left open circuit without affecting
operation of the remaining bias circuits.
To protect the external FETs the circuits have been
designed to ensure that, under any conditions including
power up/down transients, the gate drive from the bias
circuits cannot exceed the range -3.5V to 1V.
Additionally each stage has its own individual current
limiter. Furthermore if the negative rail experiences a
fault condition, such as overload or short circuit, the
drain supply to the FETs will shut down avoiding
excessive current flow.
The ZNBG3115/16 are available in QSOP16 and QSOP20
for the minimum in device size. Device operating
temperature is -40 to 80°C to suit a wide range of
environmental conditions.
FEATURES
APPLICATIONS
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Provides bias for GaAs and HEMT FETs
Drives up to three FETs
Dynamic FET protection
Drain current set by external resistor
Regulated negative rail generator requires only
2 external capacitors
Choice in drain voltage
Wide supply voltage range
Polarisation switch for LNBs
22kHz tone detection for band switching
Tone detector ignores unwanted signals
Support fr MIMIC, FET and Bipolar local
oscillator devices
Compliant with ASTRA control specifications
QSOP 16 and 20 surface mount packages
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Satellite receiver LNBs
Private mobile radio (PMR)
Cellular telephones
ISSUE 2 - JUNE 2006
1
ZNBG3115
ZNBG3116
SYMBOL
PARAMETER
CONDITIONS
MIN.
LIMITS
TYP.
MAX.
UNITS
TONE DETECTION CHARACTERISTICS
V
OUT
F
inz
AG
FV
T
V
LOV
I
LOV
V
LBL
Filter Amplifier
Bias Voltage
5
Input Impedance
Amplifier Gain
V Threshold
5
Output Stage
L
OV
Volt. Range
6
L
OV
Bias Current
L
B
Output Low
I
L
=50mA(L
B
or H
B
)
V
LOV
=0
V
LOV
=0 I
L
=0
Rlb-Csub=1MΩ
V
LOV
=3V I
L
=0mA
Rlb-Csub=1MΩ
V
LBH
V
HBL
L
B
Output High
H
B
Output Low
V
LOV
=0 I
L
=10mA
V
LOV
=3V I
L
=50mA
V
LOV
=0 I
L
=0
Rhb-Csub=1MΩ
V
LOV
=3V I
L
=0
Rhb-Gnd=1MΩ
V
HBH
H
B
Output High
V
LOV
=0 I
L
=10mA
V
LOV
=3V I
L
=50mA
Enabled
6
-3.05
Enabled
6
I
fin
=0
V
FIN
=100mV p/p
V
FIN
=100mV p/p
1.75
1.95
150
30
2.15
V
Ω
V/mA
100
-0.5
0.02
170
350
mV p/p
V
CC
-1.8 V
0.15
-2.80
0
1.0
-2.55
0.1
0.025
3.1
-2.55
0.1
0.025
3.1
µA
V
V
V
V
V
V
V
V
V
µA
V
ms
-0.01
Disabled
6
Disabled
6
Disabled
6
-0.025 0
2.9
3.0
-3.05
-2.80
0
Disabled
6
-0.01
Enabled
6
Enabled
6
-0.025 0
2.9
3.0
POLARITY SWITCH CHARACTERISTICS
I
POL
V
TPOL
T
SPOL
NOTES:
1. The negative bias voltages specified are generated on-chip using an internal oscillator. Two external capacitors, C
NB
and C
SUB
, of 47nF are required for this
purpose.
2. The characteristics are measured using an external reference resistor R
CAL
of value 33k wired from pins R
CAL
to ground.
3. Noise voltage is not measured in production.
4. Noise voltage measurement is made with FETs and gate and drain capacitors in place on all outputs. C
G
, 4.7nF, are connected between gate outputs and
ground, C
D
, 10nF, are connected between drain outputs and ground.
5 . These parameters are linearly related to V
CC
6. These parameters are measured using Test Circuit 1
Input Current
Threshold Voltage
Switching Speed
V
POL
=25V (Applied via R
POL
=2kΩ)
V
POL
=25V (Applied via R
POL
=2kΩ)
V
POL
=25V (Applied via R
POL
=2kΩ)
10
14
25
40
14.75 15.5
100
4
ISSUE 2 - JUNE 2006
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