O
ne.
20 STERN AVE.
SPRINGFIELD, NEW JERSEY 07081
U.S.A.
FEATURES
Very High Input Impedance
Low Capacitance
High Gate Breakdown 3N190-3N191
Zener Protected gate 3N188-3N189
V
g
& (TH) Matched
V
0
&(TH) Tracking
TELEPHONE: (201) 376-2922
(212)227-6005
FAX: (201) 376-8960
DUAL MATCHED
P-CHANNEL
ENHANCEMENT
MODE MOS FETS
3N188 3N189
3N190 3N191
ORDERING INFORMATION
T099
3N188
3N189
3N190
3N191
WAFER
CHIP
MAXIMUM RATINGS
(@ 25°C ambient unless noted)
3N18B
3N189
Source
Voltage
V
GSs'
1
' Transient Gate to
Source Voltage
U
GSS
S
""
c G
"
e lo
PACKAGE DIMENSIONS
TO-99
.„
3N1SO
3N191
-40V -40V
140V S125V
3N190/W
3N191/W
3N190/D
3N191/D
't!
i
i,
Ii
H3
' "' T 4lNl
L
r
m
HI 0
r™°
•~l
VSDS
In
PQ
T.
T
1(g
T,
'
[
Voltage
Source to Drain
-40V
-40V
Voltage
Drain Current
50mA
50mA
Power Dissipation
legchtide)
300 mW
0026
{both sides)
525 mW
0035
*
Total Derating Factor
4.2mW/"C
TYP
Operating Junction
-55to+150°C
Temperature
Storage Temperature
-65 to +200° C
GATE 2— '/'
Lead Temperature
+300° C
GATE 1—^
1/16" from Gate for
rc_T
n
'
^
2506C
0290
— - 0330 - -
"
0025
(-««"'
C -5'02
I--S/02
• S/01
1
NOTE: SUBSTRATE
IS BODY
F
rM
VIEW
10 sec max
" 'Device must not be tested at b1 25V more than
once or for longer than 300 me.
S'D 1--1
R
ONLY
I'
9
"
023C>
>— BODY
LEAD 1 DRAIN 1
LEAD 2 SOURCE 1
LEAD 3 GATE t
LEAD 5 GATE
7
LEAD 6 SOURCE 2
LEAD 7 DRAIN 2
^
31
V
jigo.aNiai
ALL DIMENSIONS IN INCHES UNLESS OTHERWISE NOTED
BODY ISUBSTRATE) INTERNALLY CONNECTED TO METAL CASE
ELECTRICAL CHARACTERISTICS (@ 25°C and V
BS
= 0 unless noted)
3N188
3N189
3N190
MIN
'GSS
lG(f)
lQ(f)
BVrjSS
BV
SDS
Vcsith)
v
GSith)
V
GS
'DSS
ISDS
r
ds(on)
lO(on)
Yf
s
YQS
Cj
a
Cru
CDSJ
REGIS'
G
flte
Reverse Current
Gate Forward Current
. Gate Forward Current @ 125°C
Oram-Source Breakdown Voltage
Source-Drain Breakdown Voltage
Threshold Voltage
Threshold Voltage
Gate
Source Voltage
Zero Gate Voltage Drain Current
Source Drain Current
Drain-Source on Resistance
On Drain Current
Forward Transconductance
Output Admittance
Input Capacitance Output Shorted
Reverie Transfer Capacitance
Output Capacitance Input Shorted
Real Part of Transconductance
MAX
-200
-200
3N191
MIN
MAX
10
-10
-25
UNITS
TEST CONDITIONS
-40
-40
-40
-40
-2.0 -5.0
-2.0 -5.0
-5.0
-2.0
-5.0
-2.0
-3.0 -6.5
-3.0
-6-5
-200
-200
-400
-400
300
300
-5.0
-30.0
-5.0
-30.0
1500
4000
1500
4000
300
300
4.5
4.5
1.0
1.5
3.0
3.0
1200
1200
PA
PA
PA
V
V
V
V
V
PA
PA
ohms
mA
ymhos
umhos
VGS *
-
40V
V
GS
•
-lev
ID " -10MA
Ic
=
- lOiiA, VgQ
=
0
V B S - - I S V , I
D
= - i O n A
VDS - vcSr 'o
=
-10 MA
VDS " - ' 5 V I
D
-
-soo
M
A
VDS
•
-15V
VDS'-2°
V
' lD--'°°dA
VDS-
-15V.
V
G S
- -lov
VDS --'SV. ID '-5mA,
VDS " -'5V, ID « - 5 m A .
VDS --15V. ID - - 5 m A ,
VDS
°
-15V, ID - - 5 m A .
VDS • -15V, ID - -5mA,
- 1 kHz
-1kH2
= 1 MHz
- 1 MHz
-100MHz
VDS- -15V. ID --5mA. " '
MHr
pF
SWITCHING CHARACTERISTICS (@ 25°C and V
B
g = 0 unless noted)
MIN
MAX
UNITS
'Dion)
t
r
t
0
ff
Turn On Dil
'V
Ti
™
Rise Tim*
Turn Off Tim*
15
30
50
n,
n«
ni
TEST CONDITIONS
V
D D
--16V, !
D
- - 5 m A
R
G
-R
L
-1.4kn
MATCHING CHARACTERISTICS (@ 25°C and V
BS
= 0 unless noted)
MIN
^ftl'
Y
fs2
V
GS1 2
AVQ
S1
.2
\B^^^^n^^^^^^^l^r
Y^l 1 L^^H BB^r
AVGS1--2
AT
Forward Transconductance Ratio
So
urce
Threshold Volt«g* Differential
Gate Source Threshold Voltage Differential Change
O.B5
3N188 and 3N190
i
MAX
UNITS
Gate
1.0
100
8
10
V
O S
--15V. I
D
=-500»iA, f - 1 kHz
mV
mV
mV
V
DS =
-
15V
. iD*~
500
'
lA
Vos'-i^-'o"-
500
"*'
T - -55°C to + 25'C
V
D S
--15V, !
B
--500»iA.
T-+55°Cto+12S°C
G«« Source Threshold Voltage Differential Change
with Temperature
Quality
Semi-Conductors
FPGA/CPLD
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