QL8X12-0PL68C datasheet, PDF - EEWORLD Datasheet

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QL8X12-0PL68C: DescriptionField Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQCC68, PLASTIC, LCC-68; CategoryProgrammable logic devices Programmable logic; File Size230KB，8 Pages; ManufacturerQuickLogic Corporation; Websitehttps://www.quicklogic.com

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QL8X12-0PL68C Overview

Field Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQCC68, PLASTIC, LCC-68

QL8X12-0PL68C Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	QuickLogic Corporation
Parts packaging code	LCC
package instruction	QCCJ, LDCC68,1.0SQ
Contacts	68
Reach Compliance Code	unknown
Other features	MAX 56 I/OS
maximum clock frequency	100 MHz
Combined latency of CLB-Max	14.94 ns
JESD-30 code	S-PQCC-J68
JESD-609 code	e0
length	24.2316 mm
Configurable number of logic blocks	96
Equivalent number of gates	1000
Number of entries	64
Number of logical units	96
Output times	56
Number of terminals	68
Maximum operating temperature	70 °C
Minimum operating temperature
organize	96 CLBS, 1000 GATES
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	24.2316 mm

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Description	Field Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQCC68, PLASTIC, LCC-68	Field Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQCC68, PLASTIC, LCC-68	Field Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQFP100, PLASTIC, QFP-100	Field Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQCC44, PLASTIC, LCC-44	Field Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQCC68, PLASTIC, LCC-68	Field Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQFP100, PLASTIC, QFP-100	Field Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQCC44, PLASTIC, LCC-44	Field Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQFP100, PLASTIC, QFP-100	Field Programmable Gate Array, 96 CLBs, 1000 Gates, 100MHz, 96-Cell, CMOS, PQCC44, PLASTIC, LCC-44
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	QuickLogic Corporation	QuickLogic Corporation	QuickLogic Corporation	QuickLogic Corporation	QuickLogic Corporation	QuickLogic Corporation	QuickLogic Corporation	QuickLogic Corporation	QuickLogic Corporation
Parts packaging code	LCC	LCC	QFP	LCC	LCC	QFP	LCC	QFP	LCC
package instruction	QCCJ, LDCC68,1.0SQ	QCCJ, LDCC68,1.0SQ	LFQFP, QFP100,.63SQ,20	QCCJ, LDCC44,.7SQ	QCCJ, LDCC68,1.0SQ	LFQFP, QFP100,.63SQ,20	QCCJ, LDCC44,.7SQ	LFQFP, QFP100,.63SQ,20	QCCJ, LDCC44,.7SQ
Contacts	68	68	100	44	68	100	44	100	44
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Other features	MAX 56 I/OS	MAX 56 I/OS	MAX 56 I/OS	MAX 56 I/OS	MAX 56 I/OS	MAX 56 I/OS	MAX 56 I/OS	MAX 56 I/OS	MAX 56 I/OS
maximum clock frequency	100 MHz	100 MHz	100 MHz	100 MHz	100 MHz	100 MHz	100 MHz	100 MHz	100 MHz
Combined latency of CLB-Max	14.94 ns	11.039 ns	10.375 ns	10.375 ns	10.375 ns	14.94 ns	14.94 ns	11.039 ns	11.039 ns
JESD-30 code	S-PQCC-J68	S-PQCC-J68	S-PQFP-G100	S-PQCC-J44	S-PQCC-J68	S-PQFP-G100	S-PQCC-J44	S-PQFP-G100	S-PQCC-J44
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0
length	24.2316 mm	24.2316 mm	14 mm	16.5862 mm	24.2316 mm	14 mm	16.5862 mm	14 mm	16.5862 mm
Configurable number of logic blocks	96	96	96	96	96	96	96	96	96
Equivalent number of gates	1000	1000	1000	1000	1000	1000	1000	1000	1000
Number of entries	64	64	66	40	64	66	40	66	40
Number of logical units	96	96	96	96	96	96	96	96	96
Output times	56	56	58	32	56	58	32	58	32
Number of terminals	68	68	100	44	68	100	44	100	44
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	96 CLBS, 1000 GATES	96 CLBS, 1000 GATES	96 CLBS, 1000 GATES	96 CLBS, 1000 GATES	96 CLBS, 1000 GATES	96 CLBS, 1000 GATES	96 CLBS, 1000 GATES	96 CLBS, 1000 GATES	96 CLBS, 1000 GATES
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	QCCJ	LFQFP	QCCJ	QCCJ	LFQFP	QCCJ	LFQFP	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ	LDCC68,1.0SQ	QFP100,.63SQ,20	LDCC44,.7SQ	LDCC68,1.0SQ	QFP100,.63SQ,20	LDCC44,.7SQ	QFP100,.63SQ,20	LDCC44,.7SQ
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER	FLATPACK, LOW PROFILE, FINE PITCH	CHIP CARRIER	CHIP CARRIER	FLATPACK, LOW PROFILE, FINE PITCH	CHIP CARRIER	FLATPACK, LOW PROFILE, FINE PITCH	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	5.08 mm	1.6 mm	4.57 mm	5.08 mm	1.6 mm	4.57 mm	1.6 mm	4.57 mm
Maximum supply voltage	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	J BEND	J BEND	GULL WING	J BEND	J BEND	GULL WING	J BEND	GULL WING	J BEND
Terminal pitch	1.27 mm	1.27 mm	0.5 mm	1.27 mm	1.27 mm	0.5 mm	1.27 mm	0.5 mm	1.27 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	24.2316 mm	24.2316 mm	14 mm	16.5862 mm	24.2316 mm	14 mm	16.5862 mm	14 mm	16.5862 mm

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