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HCS163KMSR

Description
HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDFP16, CERAMIC, DFP-16
Categorylogic    logic   
File Size407KB，9 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance  
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HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDFP16, CERAMIC, DFP-16

HCS163KMSR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
Parts packaging codeDFP
package instructionDFP, FL16,.3
Contacts16
Reach Compliance Codecompliant
Counting directionUP
seriesHC/UH
JESD-30 codeR-CDFP-F16
Load capacitance (CL)50 pF
Load/preset inputYES
Logic integrated circuit typeBINARY COUNTER
Maximum Frequency@Nom-Sup24000000 Hz
Operating modeSYNCHRONOUS
Number of digits4
Number of functions1
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Encapsulate equivalent codeFL16,.3
Package shapeRECTANGULAR
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
propagation delay (tpd)31 ns
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class V
Maximum seat height2.92 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
total dose200k Rad(Si) V
Trigger typePOSITIVE EDGE
width6.73 mm
minfmax24 MHz

HCS163KMSR Preview

DATASHEET
HCS163MS
Radiation Hardened Synchronous Presettable Counter
FN3087
Rev 1.00
September 1995
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
• Dose Rate Upset: >10
10
RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55 C to +125 C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC
- VIH = 70% of VCC
• Input Current Levels Ii
5A at VOL, VOH
o
o
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
MR 1
CP 2
P0 3
P1 4
P2 5
P3 6
PE 7
GND 8
16 VCC
15 TC
14 Q0
13 Q1
12 Q2
11 Q3
10 TE
9
SPE
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
MR
CP
P0
P1
P2
P3
PE
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
TC
Q0
Q1
Q2
Q3
TE
SPE
Description
The Intersil HCS163MS is a Radiation Hardened
synchronous presettable binary counter that features looka-
head carry logic for use in high speed counting applications.
Counting and parallel load, and presetting are all accom-
plished synchronously with the positive transition of the
clock.
The HCS163MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS163MS is supplied in a 16 lead Ceramic flat-
pack (K suf fix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER
HCS163DMSR
HCS163KMSR
HCS163D/Sample
HCS163K/Sample
HCS163HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
FN3087 Rev 1.00
September 1995
Page 1 of 9
DB NA
HCS163MS
Functional Block Diagram
P0
3
P1
4
P2
5
P3
Q0 Q1
6
Q2 Q3
7
PE
10
TE
TE
TE
SPE
1
9
P
T0
VCC
MR
CP
D0
MR
Q0
P
T1
D1
Q1
P
T2
D2
Q2
P
T3
D3
Q3
MR
CP
MR
CP
MR
CP
CP
2
Q0
14
13
Q1
Q2
12
Q3
11
TC
15
TRUTH TABLE
INPUTS
OPERATING MODE
Reset (clear)
Parallel Load
MR
l
h (Note 3)
h (Note 3)
Count
Inhibit
h (Note 3)
h (Note 3)
h (Note 3)
H = HIGH Voltage Level
L = LOW Voltage Level
h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition
l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition
X = Immaterial
q = Lower case letter indicate the state of the referenced output prior to the LOW-to-HIGH clock transition
= LOW-to-HIGH clock transition
NOTES:
1. The TC output is HIGH when TE is HIGH and the counter is at terminal count (HLLH for 162 and HHHH for 163)
2. The HIGH-to-LOW transition of PE or TE on the 54/74163 and 54/74160 should only occur while CP is high for conventional operation
3. The LOW-to-HIGH transition of SPE or MR on the 54/74163 should only occur while CP is high for conventional operation
X
X
CP
PE
X
X
X
h
l (Note 2)
X
TE
X
X
X
h
X
l (Note 2)
SPE
X
l
l
h (Note 3)
h (Note 3)
h (Note 3)
PN
X
l
h
X
X
X
OUTPUTS
QN
L
L
H
Count
Qn
Qn
TC
L
L
(Note 1)
(Note 1)
(Note 1)
L
FN3087 Rev 1.00
September 1995
Page 2 of 9
HCS163MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
 10mA
DC Drain Current, Any One Output
25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance
JA
JC
o
SBDIP Package. . . . . . . . . . . . . . . . . . . .
73 C/W
24
o
C/W
o
C/W
Ceramic Flatpack Package . . . . . . . . . . . 114
29
o
C/W
o
C Ambient
Maximum Package Power Dissipation at +125
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/
o
C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/
o
C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5 VCC (TR, TF) . . . . . . . . 100ns Max
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . 70% of VCC to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
1
2, 3
Output Current
(Sink)
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V ,
(Note 2)
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V, (Note 2)
VCC = 4.5V, VIH = 3.15V,
IOL = 50A, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOL = 50A, VIL = 1.65V
Output Voltage High
VOH
VCC = 4.5V, VIH = 3.15V,
IOH = -50A, VIL = 1.35V
VCC = 5.5V, VIH = 3.85V,
IOH = -50A, VIL = 1.65V
Input Leakage
Current
IIN
VCC = 5.5V, VIN = VCC or
GND
1
2, 3
1
2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
4.8
4.0
-4.8
-4.0
-
MAX
40
750
-
-
-
-
0.1
UNITS
A
A
mA
mA
mA
mA
V
PARAMETER
Supply Current
SYMBOL
ICC
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
Output Current
(Source)
IOH
Output Voltage Low
VOL
1, 2, 3
-
0.1
V
1, 2, 3
VCC
-0.1
VCC
-0.1
-
-
-
-
V
1, 2, 3
-
V
1
2, 3
0.5
5.0
-
A
A
-
Noise Immunity
Functional Test
NOTES:
FN
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, (Note 3)
7, 8A, 8B
1. All voltages referenced to device GND.
2. Force/Measure functions may be interchanged.
3. For functional tests, VO
4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
FN3087 Rev 1.00
September 1995
Page 3 of 9
HCS163MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
9
10, 11
Propagation Delay
CP to TC
TPHL,
TPLH
VCC = 4.5V
9
10, 11
Propagation Delay
TE to TC
TPHL,
TPLH
VCC = 4.5V
9
10, 11
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
2
2
2
2
2
2
MAX
26
31
29
34
21
23
UNITS
ns
ns
ns
ns
ns
ns
PARAMETER
Propagation Delay
CP to Qn
SYMBOL
TPHL,
TPLH
(NOTES 1, 2)
CONDITIONS
VCC = 4.5V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
(NOTE 1)
CONDITIONS
VCC = 5.0V, VIH = 5.0V,
VIL = 0.0V, f = 1MHz
VCC = 5.0V, VIH = 5.0V,
VIL = 0.0V, f = 1MHz
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
LIMITS
TEMPERATURE
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
MIN
-
-
-
-
16
24
20
30
12
18
10
15
13
20
3
3
0
0
15
22
30
24
-
-
-
-
-
-
-
-
MAX
68
83
10
10
-
-
UNITS
pF
pF
pF
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
PARAMETER
Capacitance Power Dissipation
SYMBOL
CPD
Input Capacitance
CIN
Pulse Width Time CP(L)
TW
Pulse Width Time MR
TW
Setup Time SPE, Pn to CP
TSU
Setup Time PE, TE to CP
TSU
Setup Time MR to CP
TSU
Hold Time Pn to CP
TH
Hold Time TE, PE, SPE to CP
TH
Removal Time
MR to CP
Maximum
Frequency
NOTE:
TREM
FMAX
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
FN3087 Rev 1.00
September 1995
Page 4 of 9
HCS163MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
PARAMETER
Supply Current
Output Current (Sink)
SYMBOL
ICC
IOL
(NOTES 1, 2)
CONDITIONS
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VCC = 4.5V , VIH = 3.15,
VIL = 1.35V, IOL = 50A
VCC = 5.5V, VIH = 3.85,
VIL = 1.65V, IOL = 50A
Output Voltage High
VOH
VCC = 4.5V, VIH = 3.15V,
VIL =1.35V, IOH = -50A
VCC = 5.5V, VIH = 3.85V,
VIL =1.65V, IOH = -50A
Input Leakage Current
Noise Immunity
Functional Test
Propagation Delay
CP to Qn
Propagation Delay
CP to TC
Propagation Delay
TE to TC
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests VO
4.0V is recognized as a logic “1”, and VO
0.5V is recognized as a logic “0”.
IIN
FN
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIH = 3.15V, VIL = 1.35V,
(Note 3)
VCC = 4.5V
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
4.0
MAX
0.75
-
UNITS
mA
mA
Output Current
(Source)
Output Voltage Low
IOH
-4.0
-
mA
VOL
-
0.1
V
-
0.1
V
VCC
-0.1
VCC
-0.1
-
-
-
V
-
V
5
-
A
-
TPHL
TPLH
TPLH
TPLH
TPHL
2
31
ns
VCC = 4.5V
2
34
ns
VCC = 4.5V
2
23
ns
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25
o
C)
GROUP B
SUBGROUP
5
5
PARAMETER
ICC
IOL/IOH
DELTA LIMIT
12A
-15% of 0 Hour
FN3087 Rev 1.00
September 1995
Page 5 of 9
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HCS163KMSR Related Products

HCS163KMSR HCS163DMSR
Description HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDFP16, CERAMIC, DFP-16 HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDIP16, SIDE BRAZED, CERAMIC, DIP-16
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker Renesas Electronics Corporation Renesas Electronics Corporation
Parts packaging code DFP DIP
package instruction DFP, FL16,.3 DIP, DIP16,.3
Contacts 16 16
Reach Compliance Code compliant compliant
Counting direction UP UP
series HC/UH HC/UH
JESD-30 code R-CDFP-F16 R-CDIP-T16
Load capacitance (CL) 50 pF 50 pF
Load/preset input YES YES
Logic integrated circuit type BINARY COUNTER BINARY COUNTER
Maximum Frequency@Nom-Sup 24000000 Hz 24000000 Hz
Operating mode SYNCHRONOUS SYNCHRONOUS
Number of digits 4 4
Number of functions 1 1
Number of terminals 16 16
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code DFP DIP
Encapsulate equivalent code FL16,.3 DIP16,.3
Package shape RECTANGULAR RECTANGULAR
Package form FLATPACK IN-LINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
power supply 5 V 5 V
propagation delay (tpd) 31 ns 31 ns
Certification status Not Qualified Not Qualified
Filter level MIL-PRF-38535 Class V MIL-PRF-38535 Class V
Maximum seat height 2.92 mm 5.08 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V
surface mount YES NO
technology CMOS CMOS
Temperature level MILITARY MILITARY
Terminal form FLAT THROUGH-HOLE
Terminal pitch 1.27 mm 2.54 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
total dose 200k Rad(Si) V 200k Rad(Si) V
Trigger type POSITIVE EDGE POSITIVE EDGE
width 6.73 mm 7.62 mm
minfmax 24 MHz 24 MHz

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