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74AUP2G07GW

Description
Buffer, AUP/ULP/V Series, 2-Func, 1-Input, CMOS, PDSO6
Categorylogic    logic   
File Size202KB，19 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
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74AUP2G07GW Overview

Buffer, AUP/ULP/V Series, 2-Func, 1-Input, CMOS, PDSO6

74AUP2G07GW Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNexperia
package instructionTSSOP,
Reach Compliance Codecompliant
seriesAUP/ULP/V
JESD-30 codeR-PDSO-G6
JESD-609 codee3
length2 mm
Logic integrated circuit typeBUFFER
Humidity sensitivity level1
Number of functions2
Number of entries1
Number of terminals6
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output characteristicsOPEN-DRAIN
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)20.7 ns
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.1 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width1.25 mm

74AUP2G07GW Preview

74AUP2G07
Low-power dual buffer with open-drain output
Rev. 8 — 17 September 2015
Product data sheet
1. General description
The 74AUP2G07 provides two non-inverting buffers with open-drain output. The output of
the device is an open drain and can be connected to other open-drain outputs to
implement active-LOW wired-OR or active-HIGH wired-AND functions.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static-power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
NXP Semiconductors
74AUP2G07
Low-power dual buffer with open-drain output
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AUP2G07GW
74AUP2G07GM
74AUP2G07GF
74AUP2G07GN
74AUP2G07GS
74AUP2G07GX
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
Name
SC-88
XSON6
XSON6
XSON6
XSON6
X2SON6
Description
plastic surface-mounted package; 6 leads
Version
SOT363
Type number
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1
1.45
0.5 mm
plastic extremely thin small outline package; no leads; SOT891
6 terminals; body 1
1
0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9
1.0
0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0
1.0
0.35 mm
plastic thermal extremely thin small outline package;
no leads; 6 terminals; body 1
0.8
0.35 mm
SOT1115
SOT1202
SOT1255
4. Marking
Table 2.
Marking
Marking code
[1]
p7
p7
p7
p7
p7
p7
Type number
74AUP2G07GW
74AUP2G07GM
74AUP2G07GF
74AUP2G07GN
74AUP2G07GS
74AUP2G07GX
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one gate)
74AUP2G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 8 — 17 September 2015
2 of 19
NXP Semiconductors
74AUP2G07
Low-power dual buffer with open-drain output
6. Pinning information
6.1 Pinning
Fig 4.
Pin configuration SOT363
Fig 5.
Pin configuration SOT886
Fig 6.
Pin configuration SOT891, SOT1115 and
SOT1202
Fig 7.
Pin configuration SOT1255 (X2SON6)
6.2 Pin description
Table 3.
Symbol
1A
GND
2A
2Y
V
CC
1Y
Pin description
Pin
1
2
3
4
5
6
Description
data input
ground (0 V)
data input
data output
supply voltage
data output
74AUP2G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 8 — 17 September 2015
3 of 19
NXP Semiconductors
74AUP2G07
Low-power dual buffer with open-drain output
7. Functional description
Table 4.
Input
nA
L
H
[1]
Function table
[1]
Output
nY
L
Z
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF state.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
50
[1]
Max
+4.6
-
+4.6
-
+4.6
20
50
-
+150
250
Unit
V
mA
V
mA
V
mA
mA
mA
C
mW
V
O
< 0 V
Active mode and Power-down mode
V
O
= 0 V to V
CC
0.5
-
-
50
65
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SC-88 package: above 87.5
C
the value of P
tot
derates linearly with 4.0 mW/K.
For X2SON6 and XSON6 packages: above 118
C
the value of P
tot
derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
V
CC
V
I
V
O
T
amb
t/V
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 0.8 V to 3.6 V
Active mode and Power-down mode
Conditions
Min
0.8
0
0
40
0
Max
3.6
3.6
3.6
+125
200
Unit
V
V
V
C
ns/V
74AUP2G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 8 — 17 September 2015
4 of 19
NXP Semiconductors
74AUP2G07
Low-power dual buffer with open-drain output
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
= 25
C
V
IH
HIGH-level input voltage
V
CC
= 0.8 V
V
CC
= 0.9 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
V
IL
LOW-level input voltage
V
CC
= 0.8 V
V
CC
= 0.9 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
V
OL
LOW-level output voltage
V
I
= V
IH
or V
IL
I
O
= 20
A;
V
CC
= 0.8 V to 3.6 V
I
O
= 1.1 mA; V
CC
= 1.1 V
I
O
= 1.7 mA; V
CC
= 1.4 V
I
O
= 1.9 mA; V
CC
= 1.65 V
I
O
= 2.3 mA; V
CC
= 2.3 V
I
O
= 3.1 mA; V
CC
= 2.3 V
I
O
= 2.7 mA; V
CC
= 3.0 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
I
I
OZ
I
OFF
I
OFF
I
CC
I
CC
C
I
C
O
V
IH
input leakage current
OFF-state output current
power-off leakage current
additional power-off
leakage current
supply current
additional supply current
input capacitance
output capacitance
HIGH-level input voltage
V
I
= GND to 3.6 V; V
CC
= 0 V to 3.6 V
V
I
= V
IH
; V
O
= 0 V to 3.6 V; V
CC
= 0 V
to 3.6 V
V
I
or V
O
= 0 V to 3.6 V; V
CC
= 0 V
V
I
or V
O
= 0 V to 3.6 V;
V
CC
= 0 V to 0.2 V
V
I
= GND or V
CC
; I
O
= 0 A;
V
CC
= 0.8 V to 3.6 V
V
I
= V
CC
0.6 V; I
O
= 0 A; V
CC
= 3.3 V
V
CC
= 0 V to 3.6 V; V
I
= GND or V
CC
V
O
= GND; V
CC
= 0 V
V
CC
= 0.8 V
V
CC
= 0.9 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
V
IL
LOW-level input voltage
V
CC
= 0.8 V
V
CC
= 0.9 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.70
V
CC
0.65
V
CC
1.6
2.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.7
0.9
-
-
-
-
-
-
-
-
0.1
0.31
0.31
0.31
0.44
0.31
0.44
0.1
0.1
0.2
0.2
0.5
40
-
-
-
-
-
-
V
V
V
V
V
V
V
A
A
A
A
A
A
pF
pF
V
V
V
V
0.3
V
CC
V
0.70
V
CC
0.65
V
CC
1.6
2.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
Conditions
Min
Typ
Max
Unit
0.30
V
CC
V
0.35
V
CC
V
0.7
0.9
V
V
T
amb
=
40 C
to +85
C
0.30
V
CC
V
0.35
V
CC
V
0.7
0.9
V
V
74AUP2G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 8 — 17 September 2015
5 of 19
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

74AUP2G07GW Related Products

74AUP2G07GW 74AUP2G07GN 74AUP2G07GM 74AUP2G07GS 74AUP2G07GF
Description Buffer, AUP/ULP/V Series, 2-Func, 1-Input, CMOS, PDSO6 Buffer, AUP/ULP/V Series, 2-Func, 1-Input, CMOS, PDSO6 Buffer, AUP/ULP/V Series, 2-Func, 1-Input, CMOS, PDSO6 Buffer, AUP/ULP/V Series, 2-Func, 1-Input, CMOS, PDSO6 Buffer, AUP/ULP/V Series, 2-Func, 1-Input, CMOS, PDSO6
Is it Rohs certified? conform to conform to conform to conform to conform to
Maker Nexperia Nexperia Nexperia Nexperia Nexperia
package instruction TSSOP, SON, VSON, VSON, VSON,
Reach Compliance Code compliant compliant compliant compliant compliant
series AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V
JESD-30 code R-PDSO-G6 R-PDSO-N6 R-PDSO-N6 S-PDSO-N6 S-PDSO-N6
JESD-609 code e3 e3 e3 e3 e3
length 2 mm 1 mm 1.45 mm 1 mm 1 mm
Logic integrated circuit type BUFFER BUFFER BUFFER BUFFER BUFFER
Humidity sensitivity level 1 1 1 1 1
Number of functions 2 2 2 2 2
Number of entries 1 1 1 1 1
Number of terminals 6 6 6 6 6
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C
Output characteristics OPEN-DRAIN OPEN-DRAIN OPEN-DRAIN OPEN-DRAIN OPEN-DRAIN
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SON VSON VSON VSON
Package shape RECTANGULAR RECTANGULAR RECTANGULAR SQUARE SQUARE
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260 260 260 260
propagation delay (tpd) 20.7 ns 20.7 ns 20.7 ns 20.7 ns 20.7 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.1 mm 0.35 mm 0.5 mm 0.35 mm 0.5 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V
Nominal supply voltage (Vsup) 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V
surface mount YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface Tin (Sn) Tin (Sn) Tin (Sn) Tin (Sn) Tin (Sn)
Terminal form GULL WING NO LEAD NO LEAD NO LEAD NO LEAD
Terminal pitch 0.65 mm 0.3 mm 0.5 mm 0.35 mm 0.35 mm
Terminal location DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30 30 30
width 1.25 mm 0.9 mm 1 mm 1 mm 1 mm

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