NPN SILICON PLANAR MEDIUM POWER
DARLINGTON TRANSISTORS
ISSUE 1 MARCH 94
FEATURES
* 50 Volt V
CEO
* Gain of 15k at I
C
= 0.5 Amp
* P
tot
=1 Watt
Not Recommended for New Design
Please Use ZTX603
2N6724
2N6725
C
B
E
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Peak Pulse Current
Continuous Collector Current
Power Dissipation at T
amb
= 25°C
Operating and Storage Temperature Range
SYMBOL
V
CBO
V
CEO
V
EBO
I
CM
I
C
P
tot
T
j
:T
stg
50
40
10
2
1
1
E-Line
TO92 Compatible
2N6724 2N6725
60
50
UNIT
V
V
V
A
A
W
°C
-55 to +200
ELECTRICAL CHARACTERISTICS (at T
amb
= 25°C unless otherwise stated).
PARAMETER
SYMBOL
V
(BR)CBO
V
(BR)CEO
V
(BR)EBO
I
CBO
I
EBO
V
CE(sat)
V
BE(sat)
V
BE(on)
h
FE
C
CB
25K
15K
4K
2N6724
2N6725
UNIT
CONDITIONS.
MIN.
Collector-Base
Breakdown Voltage
Collector-Emitter
Breakdown Voltage
Emitter-Base
Breakdown Voltage
Collector Cut-Off
Current
Emitter Cut-Off
Current
Collector-Emitter
Saturation Voltage
Base-Emitter
Saturation Voltage
Base-Emitter
Turn-On Voltage
Static Forward
Current Transfer
Ratio
Collector Base
Capacitance
50
40
10
1.0
0.1
1.0
1.5
2.0
2.0
25K
15K
4K
MAX. MIN.
60
50
10
1.0
0.1
1.0
1.5
2.0
2.0
MAX.
V
V
V
µ
A
µ
A
µ
A
I
C
=1
µ
A, I
E
=0
I
C
=1mA, I
B
=0*
I
E
=10
µ
A, I
C
=0
V
CB
=30V, I
E
=0
V
CB
=40V, I
E
=0
V
EB
=8V, I
C
=0
I
C
=200mA, I
B
=2mA*
I
C
=1A, I
B
=2mA*
IC=1A, I
B
=2mA*
IC=1A, V
CE
=5V*
I
C
=200mA, V
CE
=5V*
I
C
=500mA, V
CE
=5V*
I
C
=1A, V
CE
=5V*
V
V
V
V
40K
10
40K
10
pF
V
CB
=10V, f=1MHz
*Measured under pulsed conditions. Pulse width=300
µ
s. Duty cycle
≤
2%
3-7
FPGA/CPLD
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