ICS864S004AKI datasheet, PDF - EEWORLD Datasheet

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ICS864S004AKI: DescriptionLow Skew Clock Driver, 864S Series, 5 True Output(s), 0 Inverted Output(s), 5 X 5 MM, 0.925 MM HEIGHT, MO-220VHHD, VFQFN-32; Categorylogic logic; File Size733KB，17 Pages; ManufacturerIDT (Integrated Device Technology)

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ICS864S004AKI Overview

Low Skew Clock Driver, 864S Series, 5 True Output(s), 0 Inverted Output(s), 5 X 5 MM, 0.925 MM HEIGHT, MO-220VHHD, VFQFN-32

ICS864S004AKI Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFN
package instruction	HVQCCN,
Contacts	32
Reach Compliance Code	compliant
series	864S
Input adjustment	DIFFERENTIAL MUX
JESD-30 code	S-XQCC-N32
JESD-609 code	e0
length	5 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Number of functions	1
Number of inverted outputs
Number of terminals	32
Actual output times	5
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	225
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	5 mm
minfmax	18.75 MHz

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PRELIMINARY

LVDS ZERO DELAY BUFFER w/ JITTER ATTENUATION FOR

VIDEO APPLICATIONS

ICS864S004I

General Description

The ICS864S004I is Zero-Delay Buffer with four

differential LVDS output pairs, and uses external

HiPerClockS™

feedback for “zero delay” clock regeneration.

Another feature of the device is the ability to select

different bandwidth modes during normal operation

to allow for additional clock jitter attenuation.

Features

•

Four LVDS differential output pairs, and

one feedback output pair

One differential clock input pair PCLK, nPCLK can accept the

following differential input levels: LVDS, LVPECL, CML, SSTL

Maximum output frequency: 333.33MHz

VCO range: 1.2GHz – 2GHz

Cycle-to-cycle jitter: TBD

3.3V operating supply voltage

Two bandwidth modes allow the system designer to make jitter

attenuation/tracking skew design trade-offs

External feedback for “zero delay” clock regeneration

-40°C to 85°C ambient operating temperature

Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

ICS

The output frequency range is specified to include the most

common video rates used in professional video systems. With a

wide frequency range, the ICS864S004I is ideal for use in video

applications where zero-delay, low skew and jitter attenuation are

critical factors.

Pin Assignment

PLL_BYPASS

F_SEL2

F_SEL1

F_SEL0

GND

32 31 30 29 28 27 26 25

BW_SEL

DDA

PCLK

nPCLK

SE_CLK

GND

10 11 12 13 14 15 16

FB_OUT

CLK_SEL

nFB_IN

FB_IN

nFB_OUT

GND

nQ0

nQ1

nQ2

nQ3

32-Lead VFQFN

5mm x 5mm x 0.925mm package body

K Package

Top View

The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization and/or qualification.

Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.

IDT™ / ICS™

LVDS ZERO DELAY BUFFER

ICS864S004AKI REV. A OCTOBER 10, 2007

ICS864S004AKI Related Products

	ICS864S004AKI	ICS864S004AKIT
Description	Low Skew Clock Driver, 864S Series, 5 True Output(s), 0 Inverted Output(s), 5 X 5 MM, 0.925 MM HEIGHT, MO-220VHHD, VFQFN-32	Low Skew Clock Driver, 864S Series, 5 True Output(s), 0 Inverted Output(s), 5 X 5 MM, 0.925 MM HEIGHT, MO-220VHHD, VFQFN-32
Is it lead-free?	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	QFN	QFN
package instruction	HVQCCN,	HVQCCN,
Contacts	32	32
Reach Compliance Code	compliant	compliant
series	864S	864S
Input adjustment	DIFFERENTIAL MUX	DIFFERENTIAL MUX
JESD-30 code	S-XQCC-N32	S-XQCC-N32
JESD-609 code	e0	e0
length	5 mm	5 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER
Number of functions	1	1
Number of terminals	32	32
Actual output times	5	5
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	225	225
Certification status	Not Qualified	Not Qualified
Maximum seat height	1 mm	1 mm
Maximum supply voltage (Vsup)	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	TIN LEAD
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	30	30
width	5 mm	5 mm
minfmax	18.75 MHz	18.75 MHz

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