THIS REVISION DESCRIBED BELOW HAS BEEN AUTHORIZED FOR THE DOCUMENT LISTED.
1. DATE
(YYMMDD)
98-08-06
Form Approved
OMB No. 0704-0188
2. PROCURING
ACTIVITY NO.
3. DODAAC
6. NOR NO.
5962-R160-98
8. DOCUMENT NO.
Public reporting burden for this collection is estimated to average 2 hours per response, including the time for reviewing instructions, searching existing data
sources, gathering and maintaining the data needed, and completing and reviewing the collection of information. Send comments regarding this burden estimate
or any other aspect of this collection of information, including suggestions for reducing this burden, to Department of Defense, Washingtion Headquarters
Services, Directorate for Information Operations and Reports, 1215 Jefferson Davis Highway, Suite 1204, Arlington, VA 22202-4302, and to the Office of
Management and Budget, Paperwork Reduction Project (0704-0188), Washington, DC 20503.
PLEASE DO NOT RETURN YOUR COMPLETED FORM TO EITHER OF THESE ADDRESSED. RETURN COMPLETED FORM TO THE GOVERNMENT
ISSUING CONTRACTING OFFICER FOR THE CONTRACT/ PROCURING ACTIVITY NUMBER LISTED IN ITEM 2 OF THIS FORM.
4. ORIGINATOR
a. TYPED NAME
(First, Middle Initial,
Last)
b. ADDRESS
(Street, City, State, Zip Code)
Defense Supply Center Columbus
3990 East Broad Street
Columbus, OH 43216-5000
5. CAGE CODE
67268
7. CAGE CODE
67268
5962-90869
11. ECP NO.
9. TITLE OF DOCUMENT
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 64K x 8
ELECTRICALLY ERASABLE PROGRAMMABLE READ
ONLY MEMORY (EEPROM) , MONOLITHIC SILICON
12. CONFIGURATION ITEM (OR SYSTEM) TO WHICH ECP APPLIES
All
10. REVISION LETTER
a. CURRENT
A
b. NEW
B
Verbal coordination
record on file.
13. DESCRIPTION OF REVISION
Sheet 1:
Revisions ltr column; add "B".
Revisions description column; add "Changes in accordance with NOR 5962-R160-98".
Revisions date column; add "98-08-06".
Revision level block; add "B".
Rev status of sheets; for sheets 12 and 33, add "B".
Sheet 12: Footnote 5/, under "Timing measurement reference levels:", for Inputs delete 1 V and 2 V and replace with 1.5 V;
for Outputs delete 0.8 V and 2.0 V and replace with 1.5 V.
Revision level block; add "B".
Sheet 33: Add note beneath Table III to read: "For VOH and VOL, the logic output compare levels shall be 1.5 V for subgroups 9,
10, and 11 only."
Revision level block; add "B".
14. THIS SECTION FOR GOVERNMENT USE ONLY
a.
(X one)
X
(1) Existing document supplemented by the NOR may be used in manufacture.
(2) Revised document must be received before manufacturer may incorporate this change.
(3) Custodian of master document shall make above revision and furnish revised document.
b. ACTIVITY AUTHORIZED TO APPROVE CHANGE FOR GOVERNMENT
DSCC-VAS
d. TITLE
Chief, Microelectronics Team
15a. ACTIVITY ACCOMPLISHING REVISION
DSCC-VAS
DD Form 1695, APR 92
e. SIGNATURE
Raymond Monnin
b. REVISION COMPLETED
(Signature)
Gary L. Gross
f. DATE SIGNED
(YYMMDD)
98-08-06
c. DATE SIGNED
(YYMMDD)
98-08-06
c. TYPED NAME
(First, Middle Initial, Last)
Previous editions are obsolete.
NOTICE OF REVISION (NOR)
(See MIL-STD-480 for instructions)
This revision described below has been authorized for the document listed.
DATE (YYMMDD)
92-01-22
Form Approved
OMB No. 0704-
0188
Public reporting burden for this collection is estimated to average 1 hour per response, including the time for reviewing instructions, searching
existing data sources, gathering and maintaining the data needed, and completing and reviewing the collection of information. Send comments
regarding this burden estimate or any other aspect of this collection of information, including suggestions for reducing this burden, to Washington
Headquarters Services, Directorate for Information Operations and Reports, 1215 Jefferson Davis Highway, Suite 1204, Arlington, VA 22202-
4302, and to the Office of Information and Regulatory Affairs, Office of Management and Budget, Washington, DC 20503.
1. ORIGINATOR NAME AND ADDRESS
Defense Electronics Supply Center
Dayton, Ohio 45444-5277
2. CAGE CODE
67268
4. CAGE CODE
67268
6. TITLE OF DOCUMENT
7. REVISION LETTER
3. NOR NO.
5962-R114-92
5. DOCUMENT NO.
5962-90869
Microcircuit, Memory, Digital, CMOS, 64K x 8
Electrically Erasable Programmable Read Only
Memory (EEPROM), Monolithic Silicon
(Current) Basic
8. ECP NO.
(New) A
No registered users.
9. CONFIGURATION ITEM (OR SYSTEM) TO WHICH ECP APPLIES
All
10. DESCRIPTION OF REVISION
Sheet 1: Revisions ltr column; add "A"
Revisions description column; add "Changes in accordance with
NOR 5962-R114-92".
Revisions date column; add "92-01-22".
Sheet 8: Table IA,
high voltage (V
H
), Limits (Min) column delete "12" and substitute "15" and Limits (Max)
OE
column delete "13" and substitute "16".
Sheet 32: Table IIA, Electrical test requirements footnote 5/, delete "4.4.1e" and substitute "4.4.1d".
11. THIS SECTION FOR GOVERNMENT USE ONLY
a. CHECK ONE
A
X
B
EXISTING DOCUMENT SUPPLEMENTED
BY THIS NOR MAY BE USED IN
MANUFACTURE.
b. ACTIVITY AUTHORIZED TO APPROVE
CHANGE FOR GOVERNMENT
DESC-ECS
A B
REVISED DOCUMENT MUST BE
RECEIVED BEFORE MANUFACTURER
MAY INCORPORATE THIS CHANGE.
A B
CUSTODIAN OF MASTER DOCUMENT
SHALL MAKE ABOVE REVISION AND
FURNISH REVISED DOCUMENT TO:
SIGNATURE AND TITLE
Michael A. Frye
BRANCH CHIEF
REVISION COMPLETED (Signature)
Gary L. Gross
Previous editions are obsolete.
DATE (YYMMDD)
92-01-22
DATE (YYMMDD)
92-01-22
12. ACTIVITY ACCOMPLISHING
REVISION
DESC-ECS
DD Form 1695, JUL 88
REVISIONS
LTR
DESCRIPTION
DATE
(YR-MO-DA)
APPROVED
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
REV
SHEET
PREPARED BY
Kenneth Rice
CHECKED BY
Charles Reusing
APPROVED BY
Michael A. Frye
DRAWING APPROVAL DATE
91-10-18
REVISION LEVEL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
STANDARDIZED
MILITARY
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
MICROCIRCUIT, MEMORY, DIGITAL, CMOS
64K x 8 ELECTRICALLY ERASABLE PROGRAMMABLE
READ ONLY MEMORY (EEPROM), MONOLITHIC
SILICON
SIZE
CAGE CODE
A
SHEET
67268
1
OF
AMSC N/A
5962-90869
40
DESC FORM 193
SEP 87
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E368
1. SCOPE
1.1 Scope. This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product
assurance classes consisting of military high reliability (device classes B, Q, and M) and space application (device classes S and V),
and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class
M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of
MIL-STD-883 in conjunction with compliant non-JAN devices". When available, a choice of radiation hardness assurance (RHA) levels
are reflected in the PIN.
1.2 PIN. The PIN shall be as shown in the following example:
5962
-
90869
01
M
X
X
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
/
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 Radiation hardness assurance (RHA) designator. Device classes M, B, and S RHA marked devices shall meet the
MIL-M-38510 specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked
devices shall meet the MIL-I-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-)
indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
Generic number
28C512
"
"
"
"
"
"
"
28C513
"
"
"
"
"
"
"
Circuit function
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
Access time
250 ns
250 ns
200 ns
200 ns
150 ns
150 ns
120 ns
120 ns
250 ns
250 ns
200 ns
200 ns
150 ns
150 ns
120 ns
120 ns
Write speed
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
Write mode
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Endurance
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
1.2.3 Device class designator. The device class designator shall be a single letter identifying the product assurance level as follows:
Device class
M
Device requirements documentation
Vendor self-certification to the requirements for non-JAN class B
microcircuits in accordance with 1.2.1 of MIL-STD-883
Certification and qualification to MIL-M-38510
Certification and qualification to MIL-I-38535
B or S
Q or V
STANDARDIZED
SIZE
MILITARY DRAWING
DEFENSE ELECTRONICS SUPPLY CENTER
DAYTON, OHIO 45444
DESC FORM 193A
SEP 87
A
REVISION LEVEL
5962-90869
SHEET
2
1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Z
U
Case outline
See figure 1(32-lead, 1.685" x .600" x .225", dual in-line package
C-12 (32-terminal, .560" x .458" x .120"), rectangular chip carrier package
See figure 1(32-lead, .830" x .416" x .120"), flat package
See figure 1 (36-lead, .760" x .760" x .120"), pin grid array
1.2.5 Lead finish. The lead finish shall be as specified in MIL-M-38510 for classes M, B, and S or MIL-I-38535 for classes Q and
V. Finish letter "X" shall not be marked on the microcircuit or its packaging. The "X" designation is for use in specifications when lead
finishes A, B, and C are considered acceptable and interchangeable without preference.
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