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85104AGI

Description
Low Skew Clock Driver, 85104 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 MM X 4.40 MM, 0.92 MM HEIGHT, MO-153, TSSOP-20
Categorylogic    logic   
File Size356KB,16 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

85104AGI Overview

Low Skew Clock Driver, 85104 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 MM X 4.40 MM, 0.92 MM HEIGHT, MO-153, TSSOP-20

85104AGI Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instruction6.50 MM X 4.40 MM, 0.92 MM HEIGHT, MO-153, TSSOP-20
Contacts20
Reach Compliance Codenot_compliant
ECCN codeEAR99
series85104
Input adjustmentDIFFERENTIAL MUX
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length6.5 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals20
Actual output times4
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)225
power supply3.3 V
Prop。Delay @ Nom-Sup3.2 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.63 V
Minimum supply voltage (Vsup)2.97 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width4.4 mm
LOW SKEW, 1-TO-4, DIFFERENTIAL/
LVCMOS-TO-0.7V HCSL FANOUT BUFFER
ICS85104I
G
ENERAL
D
ESCRIPTION
The ICS85104I is a low skew, high performance 1-
to-4 Differential/LVCMOS-to-0.7V HCSL Fanout
HiPerClockS™
Buffer and a member of the HiPerClockS™ family
of High Performance Clock Solutions from IDT.
The ICS85104I has two selectable clock inputs.
The CLK0, nCLK0 pair can accept most standard differential
input levels. The single-ended CLK1 can accept LVCMOS or
LVTTL input levels. The clock enable is internally synchronized
to eliminate runt clock pulses on the outputs during asynchro-
nous assertion/deassertion of the clock enable pin.
F
EATURES
Four 0.7V differential HCSL outputs
Selectable differential CLK0, nCLK0 or LVCMOS inputs
CLK0, nCLK0 pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
CLK1 can accept the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 500MHz
Translates any single-ended input signal to 3.3V
HCSL levels with resistor bias on nCLK input
Output skew: 100ps (maximum)
Part-to-part skew: 600ps (maximum)
Propagation delay: 3.2ns (maximum)
Additive phase jitter, RMS: 0.22ps (typical)
3.3V operating supply
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
IC
S
Guaranteed output and part-to-part skew characteristics make
the ICS85104I ideal for those applications demanding well
defined performance and repeatability.
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
GND
CLK_EN
CLK_SEL
CLK0
nCLK0
CLK1
nc
nc
IREF
V
DD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
V
DD
Q1
nQ1
Q2
nQ2
V
DD
Q3
nQ3
CLK_EN
Pullup
CLK0
Pulldown
nCLK0
Pullup/Pulldown
CLK1
Pulldown
CLK_SEL
Pulldown
D
Q
LE
0
Q0
nQ0
1
Q1
nQ1
Q2
nQ2
ICS85104I
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm Package Body
G Package
Top View
IREF
Q3
nQ3
IDT
/ ICS
0.7V HCSL FANOUT BUFFER
1
ICS85104AGI REV. A FEBRUARY 25, 2009

85104AGI Related Products

85104AGI 85104AGIT
Description Low Skew Clock Driver, 85104 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 MM X 4.40 MM, 0.92 MM HEIGHT, MO-153, TSSOP-20 Low Skew Clock Driver, 85104 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 MM X 4.40 MM, 0.92 MM HEIGHT, MO-153, TSSOP-20
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TSSOP TSSOP
package instruction 6.50 MM X 4.40 MM, 0.92 MM HEIGHT, MO-153, TSSOP-20 6.50 MM X 4.40 MM, 0.92 MM HEIGHT, MO-153, TSSOP-20
Contacts 20 20
Reach Compliance Code not_compliant not_compliant
ECCN code EAR99 EAR99
series 85104 85104
Input adjustment DIFFERENTIAL MUX DIFFERENTIAL MUX
JESD-30 code R-PDSO-G20 R-PDSO-G20
JESD-609 code e0 e0
length 6.5 mm 6.5 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
Humidity sensitivity level 1 1
Number of functions 1 1
Number of terminals 20 20
Actual output times 4 4
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP
Encapsulate equivalent code TSSOP20,.25 TSSOP20,.25
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 225 225
power supply 3.3 V 3.3 V
Prop。Delay @ Nom-Sup 3.2 ns 3.2 ns
Certification status Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 3.63 V 3.63 V
Minimum supply voltage (Vsup) 2.97 V 2.97 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
width 4.4 mm 4.4 mm
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