The UT54ACS85 and the UT54ACTS85 are 4-bit magnitude
comparators that perform comparison of straight binary and
straight BCD (8-4-2-1) codes. Three fully decoded decisions
about two 4-bit words (A, B) are made and are externally avail-
able at three outputs. Devices are fully expandable to any num-
ber of bits without external gates. The cascading paths of the
devices are implemented with only a two-gate-level delay to
reduce overall comparison times for long words. An alternate
method of cascading which further reduces the comparison time
is shown in the typical application data.
The devices are characterized over full military temperature
range of -55 C to +125 C.
LOGIC SYMBOL
A0
A1
A2
A3
(A<B)IN
(A=B)IN
(A>B)IN
B0
B1
B2
B3
(10)
(12)
(13)
(15)
(2)
(3)
(4)
(9)
(11)
(14)
(1)
3
<
=
>
0
B
A
<
=
>
(7)
(6)
(5)
(A<B)OUT
(A=B)OUT
(A>B)OUT
COMP
0
3
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC
Publication 617-12.
PINOUTS
16-Pin DIP
Top View
B3
(A<B)IN
(A=B)IN
(A>B)IN
(A>B)OUT
(A=B)OUT
(A<B)OUT
V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
A3
B2
A2
A1
B1
A0
B0
16-Lead Flatpack
Top View
B3
(A<B)IN
(A=B)IN
(A>B)IN
(A>B)OUT
(A=B)OUT
(A<B)OUT
V
SS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
A3
B2
A2
A1
B1
A0
B0
51
RadHard MSI Logic
UT54ACS85/UT54ACTS85
FUNCTION TABLE
COMPARING INPUTS
A3, B3
A3>B3
A3<B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A2, B2
X
X
A2>B2
A2<B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A1, B1
X
X
X
X
A1>B1
A1<B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
A0, B0
X
X
X
X
X
X
A0>B0
A0<B0
A0=B0
A0=B0
A0=B0
A0=B0
A0=B0
CASCADING INPUTS
A>B
X
X
X
X
X
X
X
X
H
L
X
H
L
A<B
X
X
X
X
X
X
X
X
L
H
X
H
L
A=B
X
X
X
X
X
X
X
X
L
L
H
L
L
A>B
H
L
H
L
H
L
H
L
H
L
L
L
H
OUTPUTS
A<B
L
H
L
H
L
H
L
H
L
H
L
L
H
A=B
L
L
L
L
L
L
L
L
L
L
H
L
L
LOGIC DIAGRAM
(15)
A3 (1)
B3
(5)
A>B
A2 (13)
B2 (14)
A<B (2)
(3)
A=B
(4)
A>B
(6)
A=B
(12)
A1
B1 (11)
(7)
A<B
(10)
A0
(9)
B0
RadHard MSI Logic
52
UT54ACS85/UT54ACTS85
RADIATION HARDNESS SPECIFICATIONS
1
PARAMETER
Total Dose
SEU Threshold
2
SEL Threshold
Neutron Fluence
LIMIT
1.0E6
80
120
1.0E14
UNITS
rads(Si)
MeV-cm
2
/mg
MeV-cm
2
/mg
n/cm
2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
DD
V
I/O
T
STG
T
J
T
LS
JC
PARAMETER
Supply voltage
Voltage any pin
Storage Temperature range
Maximum junction temperature
Lead temperature (soldering 5 seconds)
Thermal resistance junction to case
DC input current
Maximum power dissipation
LIMIT
-0.3 to 7.0
-.3 to V
DD
+.3
-65 to +150
+175
+300
20
10
1
UNITS
V
V
C
C
C
C/W
mA
W
I
I
P
D
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device
at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
DD
V
IN
T
C
PARAMETER
Supply voltage
Input voltage any pin
Temperature range
LIMIT
4.5 to 5.5
0 to V
DD
-55 to + 125
UNITS
V
V
C
53
RadHard MSI Logic
UT54ACS85/UT54ACTS85
DC ELECTRICAL CHARACTERISTICS
7
(V
DD
= 5.0V 10%; V
SS
= 0V
6
, -55 C < T
C
< +125 C)
SYMBOL
V
IL
PARAMETER
Low-level input voltage
1
ACTS
ACS
High-level input voltage
1
ACTS
ACS
Input leakage current
ACTS/ACS
Low-level output voltage
3
ACTS
ACS
High-level output voltage
3
ACTS
ACS
Short-circuit output current
2 ,4
ACTS/ACS
Output current
10
(Sink)
I
OH
Output current
10
(Source)
P
total
I
DDQ
I
DDQ
Power dissipation
2, 8, 9
Quiescent Supply Current
Quiescent Supply Current Delta
ACTS
V
IN
= V
DD
or V
SS
I
OL
= 8.0mA
I
OL
= 100 A
I
OH
= -8.0mA
I
OH
= -100 A
V
O
= V
DD
and V
SS
V
IN
= V
DD
or V
SS
V
OL
= 0.4V
V
IN
= V
DD
or V
SS
V
OH
= V
DD
- 0.4V
C
L
= 50pF
V
DD
= 5.5V
For input under test
V
IN
= V
DD
- 2.1V
For all other inputs
V
IN
= V
DD
or V
SS
V
DD
= 5.5V
C
IN
C
OUT
Input capacitance
5
Output capacitance
5
= 1MHz @ 0V
= 1MHz @ 0V
15
15
pF
pF
2.3
10
1.6
mW/
MHz
A
mA
-8
mA
.7V
DD
V
DD
- 0.25
-200
8
200
.5V
DD
.7V
DD
-1
1
0.40
0.25
CONDITION
MIN
MAX
0.8
.3V
DD
UNIT
V
V
IH
V
I
IN
V
OL
A
V
V
OH
V
I
OS
I
OL
mA
mA
RadHard MSI Logic
54
UT54ACS85/UT54ACTS85
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V
IH
= V
IH
(min) + 20%, - 0%; V
IL
= V
IL
(max) + 0%,
- 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but
are guaranteed to V
IH
(min) and V
IL
(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm
2
, the maximum product of load capacitance (per output buffer) times frequency should not exceed
3,765 pF/MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V
SS
at frequency of 1MHz and a signal amplitude of 50mV rms maximum
7. All specifications valid for radiation dose 1E6 rads(Si).
6. Maximum allowable relative shift equals 50mV.
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10. This value is guaranteed based on characterization data, but not tested.
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Analogue and Mixed Signal
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