WSF41632-22H2M datasheet, PDF - EEWORLD Datasheet

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WSF41632-22H2M: DescriptionMemory Circuit, Flash+SRAM, 512KX32, CMOS, CPGA66, 1.385 X 1.385 INCH, PGA TYPE, HERMETIC SEALED, CERAMIC, HIP-66; Categorystorage storage; File Size591KB，14 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com

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WSF41632-22H2M Overview

Memory Circuit, Flash+SRAM, 512KX32, CMOS, CPGA66, 1.385 X 1.385 INCH, PGA TYPE, HERMETIC SEALED, CERAMIC, HIP-66

WSF41632-22H2M Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Microsemi
Parts packaging code	PGA
package instruction	1.385 X 1.385 INCH, PGA TYPE, HERMETIC SEALED, CERAMIC, HIP-66
Contacts	66
Reach Compliance Code	unknown
Maximum access time	120 ns
Other features	SRAM IS ORGANISED AS 128K X 32
JESD-30 code	S-CPGA-P66
JESD-609 code	e4
length	35.2 mm
memory density	16777216 bit
Memory IC Type	MEMORY CIRCUIT
memory width	32
Mixed memory types	FLASH+SRAM
Number of functions	1
Number of terminals	66
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	512KX32
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA66,11X11
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.7 mm
Maximum standby current	0.08 A
Maximum slew rate	0.62 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
width	35.2 mm

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White Electronic Designs

WSF41632-22XX

PRELIMINARY*

128K

32 SRAM & 512Kx32 FLASH MIXED MODULE

FEATURES

Access times of 25ns (SRAM) and 120ns (FLASH)

Packaging

• 66 pin, PGA Type, 1.385" square HIP, hermetic

ceramic HIP (Package 402)

• 68 lead, hermetic CQFP (G2T), 22.4mm (0.880")

square (Package 509) 4.57mm (0.180") height

Designed to

ﬁ

t JEDEC 68 lead 0.990" CQFJ

footprint (FIGURE 2). Package to be developed.

128Kx32 SRAM

512Kx32 5V Flash

Organized as 128Kx32 of SRAM and 512Kx32 of

Flash Memory with common data bus

Low power CMOS

Commercial, industrial and military temperature

ranges

TTL compatible inputs and outputs

Built-in decoupling caps and multiple ground pins

for low noise operation

Weight - 13 grams typical

FLASH MEMORY FEATURES

100,000 erase/program cycles minimum

Sector architecture

• 8 equal size sectors of 64KBytes each

• Any combination of sectors can be concurrently

erased. Also supports full chip erase

5V programming; 5V ± 10% supply

Embedded erase and program algorithms

Hardware write protection

Page program operation and internal program

control time.

Note: For programming information refer to

ﬂ

ash programming 4M5 application note.

* This product is under development, is not qualiﬁed or characterized and is subject to

change without notice.

PIN CONFIGURATION FOR WSF41632-22H2X

Top View

I/O

FWE

SWE

GND

I/O

FCS#

SCS#

I/O

OE#

FWE

I/O

SWE

I/O

SWE

FWE

I/O

FWE

SWE

GND

I/O

0-7

OE#

0-18

SCS#

FCS#

128K x 8 Flash

128K x 8 SRAM

FWE

SWE

Pin Description

D0-31

A0-18

SWE#1-4

SCS#

OE#

VCC

GND

FWE#1-4

FCS

Data Inputs/Outputs

Address Inputs

SRAM Write Enables

SRAM Chip Select

Output Enable

Power Supply

Ground

Not Connected

Flash Write Enables

Flash Chip Select

Block Diagram

FWE

SWE

FWE

SWE

FWE

SWE

128K x 8 Flash

128K x 8 SRAM

128K x 8 Flash

128K x 8 SRAM

128K x 8 Flash

128K x 8 SRAM

I/O

8-15

I/O

16-23

I/O

24-31

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

October, 2002

Rev. 4

White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

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