IDT71257S35C datasheet, PDF - EEWORLD Datasheet

IDT71257S35C: DescriptionStandard SRAM, 256KX1, 35ns, CMOS, CDIP24, 0.300 INCH, SIDE BRAZED, DIP-24; Categorystorage storage; File Size200KB，9 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT71257S35C Overview

Standard SRAM, 256KX1, 35ns, CMOS, CDIP24, 0.300 INCH, SIDE BRAZED, DIP-24

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	DIP
package instruction	0.300 INCH, SIDE BRAZED, DIP-24
Contacts	24
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	35 ns
I/O type	SEPARATE
JESD-30 code	R-CDIP-T24
JESD-609 code	e0
length	30.607 mm
memory density	262144 bit
Memory IC Type	STANDARD SRAM
memory width	1
Number of functions	1
Number of ports	1
Number of terminals	24
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256KX1
Output characteristics	3-STATE
Exportable	NO
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum standby current	0.03 A
Minimum standby current	4.5 V
Maximum slew rate	0.15 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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